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ATLAS LVL1 Coincidence Matrix ASIC checklist

By Francis Pierce,2014-11-03 08:33
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Rome, 15-12-2011 R.Vari, S.Veneziano 1 ATLAS LVL1 Coincidence Matrix ASIC checklist 1. tin.vhd: check timing block (it will not be synthesized). 2. tin.vhd: Evaluate the possibility of separation of tinb respect to rest of timing block. Block tinb uses clock tree leaf and not pll output directly. 3. tin.vhd: check pll_fb input connection 4. V14_BUG001: bcc.vhd:..
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