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Additional HW problems from CMOS

By Randall Bradley,2014-07-09 08:56
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Additional HW problems from CMOS

Additional end-of-chapter problems for Chapter 31 Feedback Amplifiers

    CMOS: Circuit Design, Layout, and Simulation

    A31.1 A dominant pole compensated op-amp has an open-loop DC gain of 1,000 and a unity-gain

    frequency, f, of 100 MHz. un

    a. Write an equation for the open-loop gain, A( f ), of the op-amp as a function of frequency. OL

    What is the op-amp’s 3-dB frequency?

    b. Sketch the open-loop magnitude and phase responses for this op-amp.

    c. Using two voltage-controlled voltage sources, a resistor, and a capacitor generate a SPICE

    model for this op-amp. Using SPICE show that the AC gain of the op-amp matches the

    sketches seen in part b.

    d. Using this op-amp in a unity-feedback topology (gain = +1) estimate, and sketch, the

    frequency responses (magnitude and phase) of the resulting topology. What is the circuit’s

    bandwidth? Verify your hand calculations with SPICE. What type of topology is this (e.g.,

    series-shunt, shunt-shunt, shunt-series, or series-series).

    e. Repeat part d for a gain of 1 topology implemented using two 1k resistors.

    A31.2 Show the detailed derivations of Eqs. (31.8) and (31.9). What is the minimum open-loop gain, A, OL

    required for a feedback amplifier with an ideal closed-loop gain, A, of 2 to ensure no more than CL

    0.01% gain error? Will the resulting feedback amplifier have a closed-loop gain greater than or

    less than 2 due to finite open-loop gain? Why?

    A31.3 Suppose an amplifier has the open-loop frequency response seen below. Further, suppose that the

    amplifier is used in a closed-loop configuration with a gain of 10 (20 dB). What is the feedback

    factor used in this feedback amplifier? What are the unity-gain frequencies? Write an equation

    for the closed-loop frequency responses A( f ) for the amplifier. Using these equations show that CL

    Eqs. (31.12) and (31.14) are valid.

    ?,?;;((()Hint: ? ??,!?,??,?,,?;;((?,?;;:;~

     A( f ) OL

    60 dB

     20 dB/dec

    100k 1MHz f, Hz

    A31.4 Show how the closed-loop input and output resistances of the shunt-series amplifier, Rand R, inf of

    seen in Table 31.1 (and Eqs. [31.88] and [31.89]) are derived. Use the amplifier model seen in Fig. 31.35 in your derivations and state all assumptions.

    A31.5 Examine Fig. 8.45 and the associated discussion as well as Prob. 31.3. As indicated in this material an open-loop amplifier’s input-referred noise is added to the input signal independent of

    the use of feedback. So the next question is does the feedback network add noise to the circuit? Suppose that the feedback network,;?, in a feedback amplifier has an associated input-referred and output noise given by X and X(see Ex. 8.5 for an example of the noise inoise,RMS,onoise,RMS, performance of a feedback network that may be used in a series-shunt amplifier like the one seen in Fig. 30.22). Show, using a block diagram similar to the one seen in Fig. 8.45 but for a general feedback amplifier, how the noise (output and input-referred) from the feedback network influences the overall noise performance of the feedback amplifier.

    A31.6 Examine the feedback amplifier seen below. Note the multiplier of 4 used in the output stage (MR5 conducts 40 A). Also note that M2 will supply current to both MR5 and to the feedback resistors so that it’s operating point is different from what is seen in Table 9.2 (r is smaller and op

    g is larger). mp

    a. What type of topology is employed?

    b. What is the feedback factor, ?

    c. Estimate the open-loop gain of the amplifier, A. Simulate A by removing the 9k resistor OLOL

    and then shunting the 1k resistor connected to the source of M1 with a 9k and connecting a 1k

    + 9k (10k) resistor from the output to ground (so A includes the effects of the network OLloading). How do you get each stage of the amplifier to have a stable DC operating point (hint:

    see Fig. [21.21]) for the AC simulations?

    d. Using Eq. (31.7) estimate the closed-loop gain A. Verify your estimate using simulations. CL

    e. Estimate the input and output impedances with and without feedback.

    f. Finally, determine, via simulations, the input and output ranges for linear operation.

A31.7 Repeat problem A31.6 for the following amplifier. Note that M2 will sink more than 40 A

because of the current flowing in R2.

    A31.8 For the following feedback amplifier: a. What type of topology is employed? b. What is the feedback factor, ?

    c. Estimate (hand calculate) the open-loop gain of the amplifier, A. OL

    d. Based upon your answers to b and c estimate the closed-loop gain A. Verify your estimate CL

    using simulations.

    e. Estimate the input and output impedances with and without feedback and verify your hand

    calculations with simulations.

A31.9 Repeat problem A31.8 for the following amplifier.

A31.10 Repeat problem A31.8 for the following amplifier.

A31.11 Repeat problem A31.8 for the following amplifier. The benefit of this topology is that it has a low

input resistance and a high output resistance. Note how A<< 1 but there is an amplifier, M2, in OL

the feedback path, see problem A31.13.

    A31.12 Explain how the following additions (of a capacitor, inductor, and AC voltage) to the series-shunt

    amplifier from problem A31.6 can be used to determine return ratio (RR) and thus the loop gain

    (A, note the inversion). Be sure to comment on why the DC biasing is unaffected. Determine, OLusing simulations, the phase- and gain-margins for this amplifier. What happens to these margins

    if a capacitive load is added to the output of the amplifier? Qualitatively, explain your answer in

    terms of loop delay. Use simulations to support your answer.

    A31.13 Repeat problem A31.12 for the shunt-series amplifier from problem A31.11 seen below noting the

    fed back current is flowing in C1 (an AC short). Instead of using a capacitor to show the

    degradation in the gain- and phase margins (since the output of the amplifier is a current) try using

    an inductor in series with the output. Again note how A<< 1 but since there is an amplifier, M2, OL

    in the feedback path the loop gain, A and , are greater than 1. Just looking at A alone with OLOLset to 1, as was used to discuss the stability the op-amps in Ch. 24, doesn’t work for this amplifier.

    A31.14 Redesign the amplifiers in problems A31.6 and A31.7 to utilize a source-follower (SF) output. The

    second stage of these amplifiers should not use wider devices (remove the m=4). Comment on,

    and simulate the operation of, the new amplifiers. Does the power dissipation drop with the added

    SF amplifier?

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