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DDifferential Buffer in the form of Simulator Specific IBIS

By Doris Ross,2014-10-11 01:13
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DDifferential Buffer in the form of Simulator Specific IBIS

     Differential Buffer in the form of Simulator Specific IBIS

    Srinivas Cheemalapati

    eServer Development

    Bradley Herrman

    Design tools

    Pravin Patel

    Design tools

    Research Triangle Park, N.C.

Abstract

The objective of this paper is to highlight an example of simulator specific IBIS? and

    give an anecdotal account of how to cope with IBIS that works on one simulator and not another. The goal is to explain how to capture the component supplier’s design intent in a SPECCTRAQuest? electrical model. IBIS is a data exchange format between the

    semiconductor component supplier and the end user. The target end user in this example is a SPECCTRAQuest user who is interested in performing high-speed design verification. Positioned between the component suppliers and end-users are the EDA vendors, who provides applications that can be used to verify a high-speed PCB layout. Such design verification applications require electrical models. How a component supplier’s IBIS modeling data is interpreted as an electrical model is dependent upon the

    EDA application.

     ii

Table of Contents

    Design tools ..................................................................................................................... i Abstract ...........................................................................................................................ii Illustrations .................................................................................................................... iv Objective: ........................................................................................................................ 1 Introduction: .................................................................................................................... 1 Problem: .......................................................................................................................... 1 Solutions: ........................................................................................................................ 2

    Quad2signoise ......................................................................................................... 2

    Change IBIS ............................................................................................................ 4 Conclusion: ..................................................................................................................... 5

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Illustrations

    Figure 1:SPECCTRAQuest typical simulation with original model ................................. 2 Figure 2:IBIS rising and falling waveform data ............................................................... 3 Figure 3:Typical waveform data created with quad2signoise ........................................... 3 Figure 4:SPECCTRAQuest model generated manually.................................................... 4 Figure 5:Original Model versus Adjusted model .............................................................. 5

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Objective:

    The objective of this paper is to highlight an example of simulator specific IBIS? and give an anecdotal account of how to cope with IBIS that works on one simulator and not another. The goal is to explain how to capture the component supplier’s design intent in

    a SPECCTRAQuest? electrical model.

Introduction:

    IBIS is a data exchange format between the semiconductor component supplier and the end user. The target end user in this example is a SPECCTRAQuest user who is interested in performing high-speed design verification. Positioned between the suppliers and end-users are the EDA vendors, who provides applications that can be used to verify a high-speed PCB layout. Such design verification applications require electrical models. How a component supplier’s IBIS modeling data is interpreted as an

    electrical model is dependent upon the EDA application.

Problem:

    The component supplier created an IBIS file, which included the behavior description of a differential driver. Part of the process to create an IBIS file involved verifying that the modeling data encoded in IBIS matched the source data. The component supplier had access to an EDA application that could convert IBIS into an electrical model and could be used for buffer model verification. The IBIS code was translated into an electrical model format, which was native to the simulator. The differential buffer model was simulated and the results compared to the source data. A criterion of success was to attach a differential buffer directly to a specific test load and inspect the differential waveform crossed at the midpoint between maximum and minimum switching levels. The comparison was in line with the supplier’s expectation. The IBIS code and documentation of the test load was made available for general usage.

    A SPECCTRAQuest user acquired the IBIS code and test load documentation from the supplier after making a request for electrical model data. The IBIS2signoise translator was used to convert the IBIS code into a dml format. An electrical model, which was in dml format, could be imported into Sigxp as a graphical differential buffer symbol. The differential buffer symbol was placed on a Sigxp canvass, attached to the test load and simulated. The disconcerting result was that the differential waveform didn’t cross at the

    midpoint. The transition rate and wave shape of an individual driver were reasonable, but the differential cross over was much closer to the steady state down level than the midpoint. See figure1.

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Figure 1:SPECCTRAQuest typical simulation with original model

    The source of mismatch between the supplier’s source data and SPECCTRAQuest’ prediction can be attributed to the IBIS rising waveform data and IBIS falling waveform data. See figure 2. The rising and falling waveform data were apparently developed independent of each other and weren’t aligned with respect to each other.

    Some IBIS translators read the IBIS waveform data as is and others adjust the waveform data. The component supplier was using an IBIS translator, which chopped out the time voltage pairs from the IBIS file that didn’t relate to the transition and shifted the transitions in time. Any turn on offset delay was removed. The transitions, which were documented in the rising and falling waveform data, were repositioned to start at time zero. Since the simulation results were in line with expectations, the supplier was satisfied with the usage of the adjusted and chopped waveform data and saw no reason for change.

Solutions:

    There was no supplier cooperation. Without the component’s supplier cooperation, the burden was on the end user to find a remedy. Several approaches are possible, depending on resources available.

    Quad2signoise

    A quick and easy solution is to leverage a SPECCTRAQuest’s translator called

    quad2signoise.

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Figure 2:IBIS rising and falling waveform data

    If the model format can be received in quad format, convert the quad code of the differential buffer into dml with the quad2signoise. The quad electrical model format is created without the turn on offset delay and with the transitions shifted to start at time zero. See figure 3 for an example of typical rising and falling waveform data, which was created with the quad2signoise translator.

Figure 3:Typical waveform data created with quad2signoise

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Change IBIS

    A proposed alternative is to modify the IBIS. Subtract out the turn on offset delay and align the transitions. The IBIS rising and falling waveform is tabular data organized in 4 columns. 3 columns of dependent data, which are called typical, minimum and maximum, are listed along side a corresponding column of time data. The result is 3 pairs of time voltage curve data. The challenge is to remove the increment of time that represents the turn on offset delay and shift the transition to time zero. Normally, each time voltage curve has a different turn on delay. The fast or maximum column has the least amount of turn on delay. The slow or minimum response has the greatest amount of turn on delay.

    The other challenge is to identify when each transition starts. The determination is easy in this example since the waveforms undershoot or overshoot, then reversing direction and then crosses the steady state levels at a well-defined point. In this example and referring to figure 2 or figure 4, the steady state levels are near 0 volts and .7 volts. In the typical case, the rising transition start time was selected to be 2.82ns and the falling transition start time was select to be 1.81ns.

Figure 4:SPECCTRAQuest model generated manually

    A direct approach is to create three separate copies of the IBIS file. In each copy, make the typical, min and max columns the same data. Thus, one file is all typical data or all min or all max data. The subtraction of the turn on offset doesn’t result in time voltage pair having negative time and a slow curve with residual turn on offset delay.

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    Rerun the IBIS2signoise translator to create three separate dml files without offset delay. One advantage of rerunning IBIS2signoise is that IBIS checks are rerun.

    The same process can be done with a dml file. Each dml file stores rising and falling waveform data as tabular data similar or like IBIS.

Conclusion:

    The result was a dml electrical model of a differential driver that crossed at the midpoint and captured the intent of the component supplier. Simulation results became consistent with lab observations and the component supplier’s claims. The major benefit was an

    electrical model that the SPECCTRAQuest user could use to generate credible waveforms and guide the design process to establish first pass hardware prototype success. See Figure 5.

Figure 5:Original Model versus Adjusted model

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