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AURORA SCIENTIFIC AND TECHOLOGICAL INSTITUTE LAB MANUAL-STUDENT

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AURORA SCIENTIFIC AND TECHOLOGICAL INSTITUTE LAB MANUAL-STUDENT

    AURORA SCIENTIFIC AND TECHOLOGICAL

    INSTITUTE

    LABORATORY MANUAL

    ELECTRONIC CIRCUITS LAB

    (STUDENT VERSION )

    2008-2009

    EXP . NO. 1. TWO STAGE RC-COUPLED AMPLIFIER

1. AIM:

    To Design and study the response of a two stage RC-coupled amplifier and calculation of gain and band width.

2. EQUIPMENTS AND COMPONENTS:

    i.APPARATUS

    1. CRO (Dual channel)DC-20 MHz 1 No

    2. Bread Board - ! No. .

    3. Regulated power supply- 0-30v 1 A, 1 No.

    4. DMM 3 ? Digit LCD hand held 1No

    5. Function generator ! MhZ 1 No.

ii.COMPONENTS:

    take from circuit used

3. THEORY:

    As the gain provided by a single stage amplifier is usually not sufficient to drive the load, so to achieve extra gain multi-stage amplifier are used. In multi-stage amplifiers output of one-stage is coupled to the input of the next stage. The coupling of one stage to another is done with the help of some coupling devices. If it is coupled by RC then the amplifier is called RC-coupled amplifier.

     Frequency response of an amplifier is defined as the variation of gain with respective frequency. The gain of the amplifier increases as the frequency increases from zero till it becomes maximum at lower cut-off frequency and remains constant till higher cut-off frequency and then it falls again as the frequency increases.

     At low frequencies the reactance of coupling capacitor C is quite high and hence C

    very small part of signal will pass through from one stage to the next stage.

     At high frequencies the reactance of inter electrode capacitance is very small and behaves as a short circuit. This increases the loading effect on next stage and service to reduce the voltage gain due to these reasons the voltage gain drops at high frequencies.

     At mid frequencies the effect of coupling capacitors is negligible and acts like short circuit, where as inter electrode capacitors acts like open circuit. So, the circuit becomes resistive at mid frequencies and the voltage gain remains constant during this range.

     47.0k 10.0k

    4. CIRCUIT DIAGRAM:

     1.0k 2.2k

     100.0u

    Vcc 12.0

     10.0u 10.0k 10.0u8.94v8.94v 10.0u 10.0kT2 !NPNT1 !NPNVout 10.0k 47.0k+2.05v2.05v1.4v1.4vV

    Vin 2.2k 10.0k 1.0k 10.0u 100.0u 2.2k

5. PROCEDURE:

    i.. Connect the circuit on bread board as shown in the circuit diagram.

    ii. Measure base ,emitter and collector D.C voltages of both stages and compare against estimated values.

     Estimated voltages Observed voltages

    Vb1 ,Vc1, Ve1

    Vb2, Vc2, Ve2

    iii. By keeping the amplitude of the input signal constant, vary the frequency from zero to 1 MHz.

    iv. Note down the amplitude of the output signal for corresponding values of input frequencies.

v. Calculate the voltage gain in decibels.

    vi. Plot in semi-log graph between gain vs frequency and calculate the band width.

6. OBSERVATIONS:

S.NO FREQUENCY V GAIN= V /V GAIN in dB OUTOUTIN

7. CALCULATIONS:

    i. Determine lower cut-off frequency and upper cut-off frequency from the graph.

ii. Calculate Band width.

9. RESULT:

i. Lower cut-off frequency =

ii. Upper cut-off frequency =

iii. Band width =

15. QUESTIONS:

    i. What are the advantages and disadvantages of multi-stage amplifiers?

ii. Why gain falls at HF and LF?

iii. Why the gain remains constant at MF?

    iv. Explain the function of emitter bypass capacitor, Ce?

    v. How the band width will effect as more number of stages are cascaded?

vi. Define frequency response?

vii. Give the formula for effective lower cut-off frequency, when N-number of stages

    are cascaded.

    viii. Explain the effect of coupling capacitors and inter-electrode capacitances on

    overall gain.

    ix. By how many times effective upper cut-off frequency will be reduced, if three

    identical stages are cascaded?

x. Mention the applications of two-stage RC-coupled amplifiers.

    EXP.NO.2 SERIES VOLTAGE REGULATOR

1. AIM:

    To design a transistorized series voltage regulator and study the regulation action for

i. Different values of input voltages

    ii Different values of load resistors and also to find percentage regulation.

2. EQUIPMENTS AND COMPONENTS:

    i.APPARATUS

    1. CRO (Dual channel)DC-20 MHz 1 No

    2. Bread Board - ! No. .

    3. Regulated power supply- 0-30v 1 A, 1 No.

    4. DMM 3 ? Digit LCD hand held 1No

    ii. COMPONENTS:

    1. 1kΩ Resistor 1 No.

    2. 560Ω Resistor – 1 No.

    3. 1k , 2k , 4.7k, 10k (load resistors ) 1 No each.

     4. Zener diode 1 No.

    5. Transistor SL100 1 No.

     All resistors are carbon / metal film ? W 5% unless otherwise specified.

3. THEORY:

    Voltage regulator is a device designed to maintain the output voltage as nearly constant as possible. It monitors the output voltage and generates feed back that automatically increases are decreases the supply voltage to compensate for any changes in output voltage that might occur because of change in load are changes in load voltages.

     In transistorized series voltage regulator the control element is a transistor which is in series with load. must be operated in reverse break down region, where it provides constant voltage irrespective of changes in applied voltages.The output voltage of the series voltage regulator is Vo = Vz Vbe.

     Since, Vz is constant, any change in Vo must cause a change in Vbe in order to

    maintain the above equation. So, when Vo decreases Vbe increases, which causes

    the transistor to conduct more and to produce more load current, this increase in

    load causes an increase in Vo and makes Vo as constant. Similarly, the regulation

    action happens when Vo increases also.

4. CIRCUIT DIAGRAM:

     Z1 BZD27-C5V1

     560.0T1 !NPN

    Vout 1.0k

    +

    V

    10 30vVin 1.0 1.0k

5. PROCEDURE:

i. Connect the circuit as shown in the circuit diagram.

ii. Apply the input voltage from power supply.

    iii. Measure base ,emitter and collector D.C voltages and compare against estimated

    values.

     Estimated voltages Observed voltages

    Vb1 ,Vc1, Ve1

    Vz

    iv. For a specific value of load resistor, vary the input voltage from 10 to a maximum

    of 20 volts and not the values of output voltage.

v. Change the load resistor and repeat steps 2 and 3.

    vi. Remove the load resistor and note down the voltage at no load.

vii. Find percentage regulation.

    ;VVNLFLx100Percentage regulation = VFL

    viii. Plot the graph for load regulation and line regulation.

6. OBSERVATIONS:

    S.no Vin Output voltage

    R= R= R= LLL

7. CALCULATIONS:

    ;VVNLFLx100Percentage load regulation = = VFL

    Percentage Line Regulation = (change in output ) / (change in input) X 100

9. RESULT:

     For RL = ----------------, Regulating range is____________

    For RL = ----------------, Regulating range is____________

    For RL = ----------------, Regulating range is____________

15. QUESTIONS:

    i. Define voltage regulator.

    ii. Give the advantages of series voltage regulator. .

    iii.. Explain the feed back mechanism in series voltage regulator.

iv. In series voltage regulator which is control element and explain its function.

    v. Define load and line regulation. What is ideal value ?.

vi. Which element determines output ripple ?

    vii. What determines maximum load current allowed in this circuit ?

    viii. Mention the applications of series voltage regulator.

ix. Define no load voltage and full load voltage.

x. Explain the term percentage regulation.

    EXP .NO. 3 SHUNT VOLTAGE REGULATOR

1. AIM:

    To design a transistorized shunt voltage regulator and observing the regulation action for

    i. Different values of input voltages

    ii Different values of load resistors and also to find percentage regulation.

2. EQUIPMENTS AND COMPONENTS:

    i.APPARATUS

    1. CRO (Dual channel)DC-20 MHz 1 No

    2. Bread Board - ! No. .

    3. Regulated power supply- 0-30v 1 A, 1 No.

    4. DMM 3 ? Digit LCD hand held 1No

    ii.COMPONENTS:

    1. 1kΩ Resistor – 1 No.

    2. 560Ω Resistor – 1 No.

    3. 1k , 2k , 4.7k, 10k (load resistors ) 1 No each.

     4. Zener diode IN 4007 - 1No.

     SL100 2No. 5. Transistor

     All resistors are carbon / metal film ? W 5% unless otherwise specified.

3. THEORY:

    A voltage regulator is a device or a combination of devices, design to maintain the output voltage of a power supply as nearly constant as possible even if there are changes in load or in input voltage. In shunt voltage regulator transistor Q1 acts as control element, which is in shunt with load voltage.

     The output voltage is given as

     Vo = Vz + V = Vz + Vbe1 + Vbe2 R1

The regulation action of the circuit is explained below :

    Since Vz is constant, any changes in output voltage reflects a propositional change in R1. If the output voltage decreases, voltage across R1 decreases which in turn decreases the base voltage of Q2. As a result the base current of Q1 decreases which

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