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GS5842_E_V1.5

By John Harper,2014-12-23 17:30
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GS5842_E_V1.5

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     GS5842

     Green-Power PWM Controller with Freq. Jittering

     Features

     Low Cost, Green-Power Burst-Mode PWM Very Low Start-up Current ( about 7.5?ÌA) Low Operating Current ( about 3.0mA) Current Mode Operation Under Voltage Lockout (UVLO) VDD Over Voltage Protection(OVP) programmable over-temperature protection Internal Latch

    Circuit(OTP,OVP) Built-in soft start with 1ms Built-in Frequency jitter for better EMI Signature Soft Clamped gate output voltage 16.5V VDD over voltage protect 25.5V Cycle-by-cycle current limiting Sense Fault Protection Output SCP (Short circuit Protection) Built-in Synchronized Slope Compensation

     Leading-edge blanking on Sense input

     Programmable PWM Frequency High-Voltage CMOS Process with ESD DIP-8 & SOP-8 Pb-Free Package

     Applications

     Power Adaptor Battery Charger Adapter Open Frame Switching Power Supply LCD Monitor

     General Description

     The GS5842 is a low startup current , low cost, cur rent mode PWM controller with Green-Power & burst-mode power-saving operation. The integrated functions such as the leading-edge blanking of the current sensing, internal slope compensation provide the users a high efficiency, low external component counts, and low cost solution for AC/DC power applications. The special Green-Power function provides off-time modulation to linearly decrease the switching frequency under light-load conditions. And under zero-load conditions, the power supply enters burst-mode to further reduce power consumption by shutting off PWM output. When the output of power supply is short or over loaded, the FB voltage will increase ,and if the FB voltage is higher than 5.2V for longer than 56msec the PWM output will be turned off. A external NTC resistor connected from pin RT to ground can be applied to over-temperature protection. Pulse by pulse current limit ensures a constant output current even under short circuit. PWM output will be disabled as long as VDD exceeds a threshold. When internal latch circuit is used to latch-off the controller, the latch will be reset when the power supply VDD is disabled.

     1/8

     GS5842

     Pin Assignment & Description

     1 2 3 4

     GND FB VIN RI

     Green-Power PWM Controller with Freq. Jittering

     GATE VDD SENSE RT

     8 7 6 5

     Name GND FB VIN RI RT SENSE VDD GATE

     Description GND Pin

     Voltage feedback pin. The PWM duty cycle is determined by FB and Sense. This pin is pulled high to the rectified line input through a large resistor for start-up. This pin is also used to detect line voltage to compensate for constant output power limit for universal AC input. By connecting a resistor to ground to set the switching freq.. Increasing the resistor will reduce the switching freq.. An NTC resistor is connected from this pin to ground for over-temperature protection. Current sense pin, The sensed voltage is used for current-mode control and pulse-by-pulse current limiting. Power supply voltage pin. Gate drive output to drive the external MOSFET.A soft driving waveform is implemented

     to improve EMI.

     Typical Application Circuit

     From bridge rectifier

     From auxiliary winding

     1 2 3 4

     GND FB VIN RI

     GATE

     8 7 6

     Rs

     VDD SENSE RT

     5

     NTC

     2/8

     GS5842

     Block Diagram

     RI

     0.9V

     Green-Power PWM Controller with Freq. Jittering

     VIN

     Current Reference

     VDD

     Soft Driver

     GATE

     RT

     OTP

     PWM LATCH

     Internal BIAS

     OSC

     S R

     Blanking Circuit

     SENSE

     Slope Compensation

     VDD

     UVLO

     OVP Burst Mode Controller Green Mode Controller

     56ms Debounce

     FB

     5.2V

     GND

     Absolute Maximum Ratings

     Symbol VDD VFB VSense PD Parameter

     Supply voltage Pin Voltage

     TOA TL TSTG

     Input Voltage to FB Pin Input Voltage to SENSE Pin Power Dissipation

    ESD Capability, HBM Model ESD Capability, Machine Model Operation

    Ambient Temperature Lead Temperature(Soldering)

     Storage Temperature Range

     Rating 40 -0.3 to 6V -0.3 to 6V 1000 2000 200 -40~125 DIP-8??10sec??

    260 230 -65 to + 150

     Unit V V V mW V V ?æ ?æ ?æ ?æ

     SOP-8??10sec??

     Recommended Operating Conditions

     Symbol VDD TOA Parameter VDD Supply Voltage Operation Ambient

    Temperature Min ~ Max 0~20 -30~85 Unit V ?æ

     3/8

     GS5842

     Symbol Parameter Supply Voltage (VDD Pin)

     IST ISS VTH(ON) VTH(OFF) VDD-OVP VDD-th-g Startup Current Operating

    Current Start Threshold Voltage Min. Operating Voltage VDD Over Voltage

    Protection(Latch off)

     Green-Power PWM Controller with Freq. Jittering

     Electrical Characteristics (Ta=27?ãC unless otherwise noted, VDD

    = 15V.)

     Conditions

     VDD=17 VFB= VSENSE = 0V VDD=15 ---

     Min.

     Typ.

     7.5 3.0

     Max.

     30 5 17.0 11.2 25.0 13.0

     Unit ?ÌA

     mA V V V V

     16.0 10.4 23.0 11.0

     16.5 10.8 24.5 12.0

     VDD Low-Threshold Voltage to Exit Green-OFF Mode Voltage Feedback (FB Pin) IFB Short Circuit Current VFB=0V VFB=Open VFB Open Loop Voltage Current Sensing (SEN Pin) VTH TPD ZCS Threshold voltage for current limit Delay to Output Input Impedance

     1.42 6.00

     mA V

     IVIN =0

     0.76 115 13 260 354 67 27 2.05 1.54 5.0

     0.9 200 460 70 29 2.15 1.60

     V nsec K nsec KHz KHz V VG %

     Bnk Leading Edge Blanking Time Oscillator (RI Pin) FOSC FOSC-green VN VG Frequency in nominal mode Frequency in green mode Beginning of frequency reducing at FB Voltage End of frequency reducing at FB voltage Frequency Temp. Stability RI=26K RI=26 K VDD=15V VDD=15V -30-85?æ VDD=12V, IO=50mA VDD=12V, IO=50mA VDD=15V,CL=1nF VDD=13V,CL=1nF

     63 25 1.95 1.50

     GATE Drive Output (GATE Pin)

     VOL VOH TR TF Output Low Level Output High Level Rising Time Falling Time 0.32 7.2 200 30 84 RI=26K 65 1.00 15.5 8.00 240 80 86 70 1.05 26 216 6 280 90 88 75 1.10 36 0.60 V V ns ns

     DCMAX Maximum Duty Cycle Over-Temperature Protection Section IRT Output current of pin RT VOTP Threshold voltage for over-temperature protection. RI Section RINOR RIMAX RIMIN RI Operating Range Max RI value for Protection

     ?ÌA

     V K K K

     4/8

     GS5842

     Operation Description Start-Up Current & Operating Current

     The typical start-up current is only 8?ÌA. This allows a high resistance, low-wattage start-up resistor to be used, to minimize power loss. A 1.5MOhms, 0.25W, start-up resistor and a 10?ÌF/40V VDD hold-up capacitor would be sufficient for an AC/DC adapter with a universal input range. The required operating current has been reduced to 3.4mA. This results in higher efficiency and reduces the VDD hold-up capacitance requirement.

     Green-Power PWM Controller with Freq. Jittering

     from around 63KHz to 70KHz for a center frequency 67kHz. The frequency jittering function helps reduce EMI emission of a power supply with minimum line filters.

     I RT =

     70?ÌA * 26 R I ( K?)

     Leading Edge Blanking

     Each time the power MOSFET is switched on, a turn-on spike will inevitably occur at the sense-resistor. To avoid premature termination of the switching pulse, a leading-edge blanking time is built in. During this blanking period, the current-limit comparator is disabled, and it cannot switch off the gate drive.

     Green-Power Mode Operation

     The proprietary green-power mode function provides off-time modulation to continuously decrease the PWM frequency under light-load conditions. To avoid acoustic-noise problem, the minimum PWM frequency set above 25KHz. This green-power mode function dramatically reduces power consumption under light-load and zero-load conditions. Power supplies using a GS5842 controller can easily meet even the most restrictive international regulations regarding standby power consumption.

     Under-Voltage Lockout (UVLO)

     The turn-on/turn-off thresholds are fixed internally at 12.4V/16.5V. To enable a GS5842 controller during start-up, the hold-up capacitor must first be charged to 16.5V through the start-up resistor. The hold-up capacitor will continue to supply VDD before energy can be delivered from the auxiliary winding of the main transformer. VDD must not drop below 12.4V during this start-up process. This UVLO hysteresis window ensures that the hold-up capacitor can adequately supply VDD during start-up.

     Oscillator Operation

     A resistor connected from the RI pin to GND pin generates a constant current source for the GS5842 controller. This current is used to determine the center PWM frequency. Increasing the resistance will reduce PWM frequency. Using a 26K resistor RI results in a corresponding 67KHz PWM frequency. The relationship between RI and the switching frequency is:

     Gate Output / Soft Driving

     The GS5842 output stage is a fast totem pole gate driver. Cross-conduction has been avoided to minimize heat dissipation, increase efficiency, and enhance reliability. The output driver is clamped by an internal 18V Zener diode in order to protect the power MOSFET transistors from any harmful over-voltage gate signals. A soft driving waveform is implemented to minimize EMI.

     f PWM =

     1742 ( KHz ) R I ( K ?)

     GS5842 also integrates frequency jittering function internally. The frequency variation ranges

     5/8

     GS5842

     Slope Compensation

     The sensed voltage across the current sense resistor is used for peak-current-mode control and cycle-by-cycle current limiting. The built-in slope compensation function improves power supply stability and prevents peak-current-mode control from causing sub-harmonic oscillations. Within every switching cycle, the GS5842 controller produces a positively sloped, synchronized ramp signal.

     Green-Power PWM Controller with Freq. Jittering

     will be turned off. Over-voltage conditions are usually caused by open feedback loops.

     Limited Power Control

     The FB voltage will increase every time the output of the power supply is shorted or over-loaded. If the FB voltage remains higher than a built-in threshold for longer than TLPS, PWM output will then be turned off. As PWM output is turned off, the supply voltage VDD will also begin decreasing. When VDD goes below the turn-off threshold (eg, 12.4V) the controller will be totally shut down. VDD will be charged up to the turn-on threshold voltage of 16.5V through the start-up resistor until PWM output is restarted. This protection feature will continue to be activated as long as the over-loading condition persists. This will prevent the power supply from overheating due to over loading conditions.

     Constant Output Power Limit

     When the SENSE voltage across the sense resistor RS reaches the threshold voltage, the output GATE drive will be turned off following a small propagation delay TPD. This propagation delay will result in an additional current proportional to TPD*VIN/LP. The propagation delay is nearly constant regardless of the input line voltage VIN. Higher input line voltages will result in larger additional currents. Thus, under high input-line voltages the output power limit will be higher than under low input-line voltages. The output power limit variation can be significant over a wide range of AC input voltages. To compensate for this, the threshold voltage is adjusted by the current IIN. Since the pin VIN is connected to the rectified input line voltage through the start-up resistor, a higher line voltage will result in a higher current IIN through the pin VIN. The threshold voltage decreases if the current IIN increases. A small threshold voltage will force the output GATE drive to terminate earlier, thus reducing total PWM turn-on time, and making the output power equal to that of the low line input. This proprietary internal compensation feature ensures a constant output power limit over a wide range of AC input voltages (90VAC to 264VAC).

     Thermal Protection

     An external NTC thermistor can be connected from the RT pin to ground. A fixed current IRT is sourced from the RT pin. Because the impedance of the NTC will decrease at high temperatures, when the voltage of the RT pin drops below 1.065V, PWM output will be disabled. The RT pin output current is related to the PWM frequency programming resistor RI .

     Noise Immunity

     Noise from the current sense or the control signal may cause significant pulse width jitter, particularly in continuous-conduction mode. Slope compensation helps alleviate this problem. Good placement and layout practices should be followed. The designer should avoiding long PCB traces and component leads. Compensation and filter components should be located near the GS5842. Finally, increasing the power-MOS gate resistance is advised.

     VDD Over-voltage Protection

     VDD over-voltage protection has been built in to prevent damage due to over voltage conditions. When the voltage VDD exceeds the internal threshold due to abnormal conditions, PWM output

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     GS5842

     Package Dimensions

     Green-Power PWM Controller with Freq. Jittering

     DIP-8L

     Dimensions

     Symbol

     A A1 A2 b b1 D E E1 e L eB ?È?

     Millimeters Min.

     0.381 3.175 3.302 1.524 0.457 9.017 9.271 7.620 6.223 6.350 2.540 2.921 8.509 0? 3.302 9.017 7? 3.810 9.525 15? 0.115 0.335 0? 6.477 0.245 10.160 0.355 3.429

     Inches Max.

     5.334 0.015 0.125 0.130 0.060 0.018 0.365 0.300 0.250 0.100 0.130 0.355 7? 0.150 0.375 15? 0.255 0.400 0.135

     Typ.

     Min.

     Typ.

     Max.

     0.210

     7/8

     GS5842 SOP-8L

     Green-Power PWM Controller with Freq. Jittering

     Dimensions Disclaimers

     Symbol

     A A1 b c D E e F H L ?È? 5.791 0.406 0?ã 4.648 3.810 1.016 1.270

    0.381X45?ã 6.197 1.270 8?ã 0.228 0.016 0?ã

     Min.

     1.346 0.101

     Millimeter Typ.

     Max.

     1.752 0.254

     Min.

     0.053 0.004

     Inch Typ.

     Max.

     0.069 0.010

     0.406 0.203 4.978 3.987 1.524 0.183 0.150 0.040

     0.016 0.008 0.196 0.157 0.050 0.015X45?ã 0.244 0.050 8?ã 0.060

     Oct. 2009

     V1.5

     8/8

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