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PCA9515ADP

By Andrea Fox,2014-08-25 18:40
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PCA9515ADP

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     PCA9515A

     I2C-bus repeater

     Rev. 04 ?ª 11 April 2008 Product data sheet

     1. General description

     The PCA9515A is a CMOS integrated circuit intended for application in I2C-bus and SMBus systems. While retaining all the operating modes and features of the I2C-bus system, it permits extension of the I2C-bus by buffering both the data (SDA) and the clock (SCL) lines, thus enabling two buses of 400 pF. The I2C-bus capacitance limit of 400 pF restricts the number of devices and bus length. Using the PCA9515A enables the system designer to isolate two halves of a bus, thus more devices or longer length can be accommodated. It can also be used to run two buses, one at 5 V and the other at 3.3 V or a 400 kHz and 100 kHz bus, where the 100 kHz bus is isolated when 400 kHz operation of the other is required. Two or more PCA9515As cannot be put in series. The PCA9515A design does not allow this con?guration. Since there is no direction pin, slightly different ??legal?? low voltage levels are used to avoid lock-up conditions between the input and the output. A ??regular LOW?? applied at the input of a PCA9515A will be propagated as a ??buffered LOW?? with a slightly higher value. When this ??buffered LOW?? is applied to another PCA9515A, PCA9516A or PCA9518/A in series, the second PCA9515A, PCA9516A or PCA9518/A will not recognize it as a ??regular LOW?? and will not propagate it as a ??buffered LOW?? again. The PCA9510/A, PCA9511/A, PCA9512/A, PCA9513/A, PCA9514/A cannot be used in series with the PCA9515A, PCA9516A or PCA9518/A, but can be used in series with themselves since they use shifting instead of static offsets to avoid lock-up conditions. The output pull-down of each internal buffer is set for approximately 0.5 V, while the input threshold of each internal buffer is set about 0.07 V lower, when the output is internally driven LOW. This prevents a lock-up condition from occurring.

     2. Features

     I I I I I I I I I I 2-channel, bidirectional buffer I2C-bus and SMBus compatible Active HIGH repeater enable input Open-drain input/outputs Lock-up free operation Supports arbitration and clock stretching across the repeater Accommodates Standard-mode and Fast-mode I2C-bus devices and multiple masters Powered-off high-impedance I2C-bus pins Operating supply voltage range of 2.3 V to 3.6 V 5.5 V tolerant I2C-bus and enable pins

     NXP Semiconductors

     PCA9515A

     I2C-bus repeater

     I 0 Hz to 400 kHz clock frequency (the maximum system operating frequency may be less than 400 kHz because of the delays added by the repeater) I ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per JESD22-A115, and 1000 V CDM per JESD22-C101 I Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA I Packages offered: SO8 and TSSOP8 (MSOP8)

     3. Ordering information

     Table 1. Ordering information Tamb = ?40 ?ãC to +85 ?ãC. Type number PCA9515AD PCA9515ADP Topside mark PA9515A 9515A Package Name SO8 TSSOP8[1] Description plastic small outline package; 8 leads; body width 3.9 mm plastic thin shrink small outline package; 8 leads; body width 3 mm Version SOT96-1 SOT505-1

     [1]

     Also known as MSOP8.

     4. Functional diagram

     VCC

     PCA9515A

     SDA0 SDA1

     SCL0

     SCL1

     pull-up resistor EN

     002aad738

     GND

     Fig 1.

     Functional diagram of PCA9515A

     PCA9515A_4

     NXP B.V. 2008. All rights reserved.

     Product data sheet

     Rev. 04 ?ª 11 April 2008

     2 of 18

     NXP Semiconductors

     PCA9515A

     I2C-bus repeater

     5. Pinning information

     5.1 Pinning

     n.c. SCL0 SDA0 GND

     1 2

     8 7

     VCC SCL1 SDA1 EN

     n.c. SCL0 SDA0 GND

     1 2 3 4

     002aad737

     8 7

     VCC SCL1 SDA1 EN

     PCA9515AD

     3 4

     002aad736

     6 5

     PCA9515ADP

     6 5

     Fig 2.

     Pin con?guration for SO8

     Fig 3.

     Pin con?guration for TSSOP8 (MSOP8)

     5.2 Pin description

     Table 2. Symbol n.c. SCL0 SDA0 GND EN SDA1 SCL1 VCC Pin description Pin 1 2 3 4 5 6 7 8 Description not connected serial clock bus 0; open-drain 5 V tolerant I/O serial data bus 0; open-drain 5 V tolerant I/O supply ground (0 V) active HIGH repeater enable input (internal pull-up with 100 k?) serial data bus 1; open-drain 5 V tolerant I/O serial clock bus 1; open-drain 5 V tolerant I/O supply voltage

     PCA9515A_4

     NXP B.V. 2008. All rights reserved.

     Product data sheet

     Rev. 04 ?ª 11 April 2008

     3 of 18

     NXP Semiconductors

     PCA9515A

     I2C-bus repeater

     6. Functional description

     Refer to Figure 1 ??Functional diagram of PCA9515A??. The PCA9515A integrated circuit contains two identical buffer circuits which enable I2C-bus and similar bus systems to be extended without degradation of system performance. The PCA9515A contains two bidirectional, open-drain buffers speci?cally designed to support the standard LOW-level contention arbitration of the I2C-bus. Except during arbitration or clock stretching, the PCA9515A acts like a pair of non-inverting, open-drain buffers, one for SDA and one for SCL.

     6.1 Enable

     The EN pin is active HIGH with an internal pull-up and allows the user to select when the repeater is active. This can be used to isolate a badly behaved slave on power-up until after the system power-up reset. It should never change state during an I2C-bus operation because disabling during a bus operation will hang the bus and enabling part way through a bus cycle could confuse the I2C-bus parts being enabled. The enable pin should only change state when the global bus and the

    repeater port are in an idle state to prevent system failures.

     6.2 I2C-bus systems

     As with the standard I2C-bus system, pull-up resistors are required to provide the logic HIGH levels on the buffered bus (standard open-collector con?guration of the I2C-bus). The size of these pull-up resistors depends on the system, but each side of the repeater must have a pull-up resistor. This part designed to work with Standard-mode and Fast-mode I2C-bus devices in addition to SMBus devices. Standard-mode I2C-bus devices only specify 3 mA output drive; this limits the termination current to 3 mA in a generic I2C-bus system where Standard-mode devices and multiple masters are possible. Under certain conditions higher termination currents can be used. Please see Application Note AN255, I2C/SMBus Repeaters, Hubs and Expanders for additional information on sizing resistors and precautions when using more than one PCA9515A/PCA9516A in a system or using the PCA9515A/PCA9516A in conjunction with the P82B96.

     PCA9515A_4

     NXP B.V. 2008. All rights reserved.

     Product data sheet

     Rev. 04 ?ª 11 April 2008

     4 of 18

     NXP Semiconductors

     PCA9515A

     I2C-bus repeater

     7. Application design-in information

     A typical application is shown in Figure 4. In this example, the system master is running on a 3.3 V I2C-bus while the slave is connected to a 5 V bus. Both buses run at 100 kHz unless the slave bus is isolated and then the master bus can run at 400 kHz. Master devices can be placed on either bus.

     3.3 V

     5V

     10 k?

     10 k?

     10 k?

     10 k?

     VCC SDA SCL BUS MASTER 400 kHz SDA0 SCL0 SDA1 SCL1 SDA SCL SLAVE 100 kHz

     PCA9515A

     EN bus 0 bus 1

     002aad739

     Fig 4.

     Typical application

     The PCA9515A is 5 V tolerant, so it does not require any additional

null

     Bus 1 waveform

     8. Limiting values

     Table 3. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages with respect to pin GND. Symbol VCC Vbus I Ptot Tstg Tamb Parameter supply voltage voltage on DC current total power dissipation storage temperature ambient temperature operating in free air I2C-bus, SCL or SDA any pin Conditions Min ?0.5 ?0.5 ?55 ?40 Max +7 +7 50 100 +125 +85 Unit V V mA mW ?ãC ?ãC

     PCA9515A_4

     NXP B.V. 2008. All rights reserved.

     Product data sheet

     Rev. 04 ?ª 11 April 2008

     6 of 18

     NXP Semiconductors

     PCA9515A

     I2C-bus repeater

     9. Static characteristics

     Table 4. Static characteristics (VCC = 3.0 V to 3.6 V) VCC = 3.0 V to 3.6 V[1]; GND = 0 V; Tamb = ?40 ?ãC to +85 ?ãC; unless otherwise speci?ed. Symbol Supplies VCC ICCH supply voltage HIGH-level supply current both channels HIGH; VCC = 3.6 V; SDAn = SCLn = VCC both channels LOW; VCC = 3.6 V; one SDA and one SCL = GND; other SDA and SCL open VCC = 3.6 V; SDAn = SCLn = GND 3.0 0.8 3.6 5 V mA Parameter Conditions Min Typ[2] Max Unit

     ICCL

     LOW-level supply current

     -

     1.7

     5

     mA

     ICCLc

     contention LOW-level supply current

     -

     1.6

     5

     mA

     Input SCLn; input/output SDAn VIH VIL VILc VIK ILI IIL VOL VOL?VILc HIGH-level input voltage LOW-level input voltage contention LOW-level input voltage input clamping voltage input leakage current LOW-level input current LOW-level output voltage II = ?18 mA VI = 3.6 V SDAn, SCLn; VI = 0.2 V IOL = 20 ?ÌA or 6 mA

     [3] [3]

     0.7VCC ?0.5 ?0.5 ?1 0.47 -

     0.52 -

     5.5 +0.3VCC +0.4 ?1.2 +1 5 0.6 70

     V V V V ?ÌA ?ÌA V mV

     difference between LOW-level output guaranteed by design and LOW-level input voltage contention input capacitance LOW-level input voltage HIGH-level input voltage LOW-level input current on pin EN input leakage current input capacitance VI = 3.0 V or 0 V VI = 0.2 V VI = 3 V or 0 V

     Ci Enable VIL VIH IIL(EN) ILI Ci

     [1] [2] [3]

     0.5 2.0 ?1 -

     6 ?10 6

     7 +0.8 5.5 ?30 +1 7

     pF V V ?ÌA ?ÌA pF

     For operation between published voltage ranges, refer to worst-case parameter in both ranges. Typical value taken at VCC = 3.3 V and Tamb = 25 ?ãC. VIL speci?cation is for the ?rst LOW level seen by the SDAn/SCLn lines. VILc is for the second and subsequent LOW levels seen by the SDAn/SCLn lines.

     PCA9515A_4

     NXP B.V. 2008. All rights reserved.

     Product data sheet

     Rev. 04 ?ª 11 April 2008

     7 of 18

     NXP Semiconductors

     PCA9515A

     I2C-bus repeater

     Table 5. Static characteristics (VCC = 2.3 V to 2.7 V) VCC = 2.3 V to 2.7 V[1]; GND = 0 V; Tamb = ?40 ?ãC to +85 ?ãC; unless otherwise speci?ed. Symbol Supplies VCC ICCH supply voltage HIGH-level supply current both channels HIGH; VCC = 2.7 V; SDAn = SCLn = VCC both channels LOW; VCC = 2.7 V; one SDA and one SCL = GND; other SDA and SCL open VCC = 2.7 V; SDAn = SCLn = GND 2.3 0.8 2.7 5 V mA Parameter Conditions Min Typ[2] Max Unit

     ICCL

     LOW-level supply current

     -

     1.6

     5

     mA

     ICCLc

     contention LOW-level supply current

     -

     1.6

     5

     mA

     Input SCLn; input/output SDAn VIH VIL VILc VIK ILI IIL VOL VOL?VILc HIGH-level input voltage LOW-level input voltage contention LOW-level input voltage input clamping voltage input leakage current LOW-level input current LOW-level output voltage II = ?18 mA VI = 2.7 V SDAn, SCLn; VI = 0.2 V IOL = 20 ?ÌA or 6 mA

     [3] [3]

     0.7VCC ?0.5 ?0.5 ?1 0.47 -

     0.52 -

     5.5 +0.3VCC +0.4 ?1.2 +1 10 0.6 70

     V V V V ?ÌA ?ÌA V mV

     difference between LOW-level output guaranteed by design and LOW-level input voltage contention input capacitance LOW-level input voltage HIGH-level input voltage LOW-level input current on pin EN input leakage current input capacitance VI = 3.0 V or 0 V VI = 0.2 V VI = 3 V or 0 V

     Ci Enable VIL VIH IIL(EN) ILI Ci

     [1] [2] [3]

     0.5 2.0 ?1 -

     6 ?10 6

     7 +0.8 5.5 ?30 +1 7

     pF V V ?ÌA ?ÌA pF

     For operation between published voltage ranges, refer to worst-case parameter in both ranges. Typical value taken at VCC = 2.5 V and Tamb = 25 ?ãC. VIL speci?cation is for the ?rst LOW level seen by the SDAn/SCLn lines. VILc is for the second and subsequent LOW levels seen by the SDAn/SCLn lines.

     PCA9515A_4

     NXP B.V. 2008. All rights reserved.

     Product data sheet

     Rev. 04 ?ª 11 April 2008

     8 of 18

     NXP Semiconductors

     PCA9515A

     I2C-bus repeater

     10. Dynamic characteristics

     Table 6. Dynamic characteristics (VCC = 2.3 V to 2.7 V) VCC = 2.3 V to 2.7 V; GND = 0 V; Tamb = ?40 ?ãC to +85 ?ãC; unless otherwise speci?ed. Symbol tPHL tPLH tTHL tTLH tsu th

     [1] [2]

     Parameter HIGH-to-LOW propagation delay LOW-to-HIGH propagation delay HIGH to LOW output transition time LOW to HIGH output transition time set-up time hold time

     Conditions Figure 7 Figure 7 Figure 7 Figure 7 EN HIGH before START

condition EN HIGH after STOP condition

     [2] [2]

     Min 45 33 100 130

     Typ[1] 82 113 57 148 -

     Max 130 190 -

     Unit ns ns ns ns ns ns

     Typical values taken at VCC = 2.5 V and Tamb = 25 ?ãC. Different load resistance and capacitance will alter the RC time constant, thereby changing the propagation delay and transition times.

     Table 7. Dynamic characteristics (VCC = 3.0 V to 3.6 V) VCC = 3.0 V to 3.6 V; GND = 0 V; Tamb = ?40 ?ãC to +85 ?ãC; unless otherwise speci?ed. Symbol tPHL tPLH tTHL tTLH tsu th

     [1] [2]

     Parameter HIGH-to-LOW propagation delay LOW-to-HIGH propagation delay HIGH to LOW output transition time LOW to HIGH output transition time set-up time hold time

     Conditions Figure 7 Figure 7 Figure 7 Figure 7 EN HIGH before START condition EN HIGH after STOP condition

     [2] [2]

     Min 45 33 100 100

     Typ[1] 68 102 58 147 -

     Max 120 180 -

     Unit ns ns ns ns ns ns

     Typical values taken at VCC = 3.3 V and Tamb = 25 ?ãC. Different load resistance and capacitance will alter the RC time constant, thereby changing the propagation delay and transition times.

     10.1 AC waveforms

     3.3 V input 1.5 V tPHL 80 % output 1.5 V tPLH 80 % 0.1 V 3.3 V

     1.5 V 20 % tTHL

     1.5 V 20 %

     tTLH

     VOL

     002aad478

     Fig 7.

     Propagation delay and transition times

     PCA9515A_4

     NXP B.V. 2008. All rights reserved.

     Product data sheet

     Rev. 04 ?ª 11 April 2008

     9 of 18

     NXP Semiconductors

     PCA9515A

     I2C-bus repeater

     11. Test information

     VCC VCC

     RL

     PULSE GENERATOR

     VI DUT

     RT

     VO

     CL

     002aad479

     RL = load resistor; 1.35 k? CL = load capacitance includes jig and probe capacitance; 50 pF RT = termination resistance should be equal to Zo of pulse generators

     Fig 8.

     Test circuit for open-drain outputs

     PCA9515A_4

     NXP B.V. 2008. All rights reserved.

     Product data sheet

     Rev. 04 ?ª 11 April 2008

     10 of 18

     NXP Semiconductors

     PCA9515A

     I2C-bus repeater

     12. Package outline

     SO8: plastic small outline package; 8 leads; body width 3.9 mm SOT96-1

     D

     E

     A X

     c y HE v M A

     Z 8 5

     Q A2 A1 pin 1 index ?È Lp 1 e bp 4 w M L detail X (A 3) A

     0

     2.5 scale

     5 mm

     DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches Notes 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. OUTLINE VERSION SOT96-1 REFERENCES IEC 076E03 JEDEC MS-012 JEITA EUROPEAN PROJECTION A max. 1.75 0.069 A1 0.25 0.10 A2 1.45 1.25 A3 0.25 0.01 bp 0.49 0.36 c 0.25 0.19 D (1) 5.0 4.8 0.20 0.19 E (2) 4.0 3.8 0.16 0.15 e 1.27 0.05 HE 6.2 5.8 L 1.05 Lp 1.0 0.4 Q 0.7 0.6 v 0.25 0.01 w 0.25 0.01 y 0.1 0.004 Z (1) 0.7 0.3 0.028 0.012 ?È

     0.010 0.057 0.004 0.049

     0.019 0.0100 0.014 0.0075

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