Test for Analog IC

By Troy Graham,2014-11-17 11:40
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Test for Analog IC

Analog Integrated Circuits


    一、Device Physics (30pts)

    1. In a p+n junction diode, if the reverse-biased voltage decreases, the depletion width

    decrease/increase/remain constant;

    2. In a pn junction diode, a high breakdown voltage is caused by

     The predominant breakdown

    mechanism in very highly doped diode is

    3. True or false: In a p++n junction (NA>>ND), the depletion capacitance is mostly determined

    by NA;

    4. As the forward-biased voltage of a p+n junction diode increases, the depletion capacitance

    decreases/increases/remain constant;

    5. What physical phenomenon do Early voltage effects describe (qualitatively, what happens

    to the device)?

6. The current gain β of an NPN BJT decrease/increase/remain constant with rising


    7. True or False: The current gain β of an NPN BJT is dependent on both emitter injection

    efficiency and base-transport factor;

    8. Breakdown voltage BVCEO is less than/greater than /equal to BVCBO;

    9. If a MOS transistor is in the saturation region and its drain current exhibits a linear

    dependence with respect to gate-source voltage, what physical phenomenon is more than

    likely occurring?

Analog Integrated Circuits


    How can a designer ensure a square-law behavior?


    10. In what region of operation is the device shown below operating?

11. On the figure above, the effective threshold voltage decreases/increases/remains constant

    BS is increased from zero to 400 mV. when the bulk-source voltage V

    12. If a MOSFETs channel is only weakly inverted, its current is mainly due to


    13. In the space provided, roughly sketch the value of capacitor Cgs as an NMOS device

    transitions from cut-off, through triode, on to saturation. (4pts)

Analog Integrated Circuits


    二、Determine the output current and output resistance of the circuit shown in the figure.

    -15 15pts Assume βF200, Is510A, VA125V

    三、Determine the unloaded voltage gain and output resistance for the circuit of the figure. Neglect rµ; (15pts)