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Initial Development Plan for Mobile WiMAXDevelopment/Verification PlatformThe expected platform for project development and verification is the ARM-based platform,...


    Initial Development Plan for Mobile WiMAX

    1 Development/Verification Platform

    The expected platform for project development and verification is the ARM-based platform, as

    shown in Figure 1. There are 4 main parts of this platform: Main board, FPGA board, ICE and

    Software Tool-Chain Package.

    C source code(WiMAX MAC)

    Main Board

    Software Tool-FPGA Chain Package:Board

    (C - Compiler,WiMAX PHY)Debugger andARM Simuator

    AMBA AHB Bus

    Other ARM9 CPUPeripheraltestchipICEComponents

    High Speed PC interface

    Figure 1 ARM-based Platform System

    ? Main Board: contains ARM9 CPU test chip (ARM-926 EJS is recommended), FPGA

    socket and other peripherals. The connection between these components is the AMBA bus

    (AHB or APB). A high-speed interface to PC is a plus (PCI is recommended) to facilitate

    higher-level application development. Referenced price: U$7000.

    ? FPGA Board: contains an FPGA chip (Xilinx XC2V6000 or Altera StratixEP1S30 is

    recommended). WiMAX PHY will be implemented on this board. Referenced price:


    ? ICE: is the hardware interfacing between software debugger and the ARM CPU. It is

    companion with the software debugger. Referenced price: U$6000.

    ? Software Tool-Chain Package: Includes the program editor, C compiler, software

    debugger and ARM simulator. The ARM simulator is the software alias of the hardware

    chip. Initially, MAC development is able to target to the simulator instead of the chip.

    Referenced price: U$6500.

    The above platform is made by ARM itself. For detail price and deliverable information, please

    contact with the agents:

    ? 智原科技 : 03-5787888-8345 吳靜虹.

    ? 創意電子 : Dr. Wu may provide the way for contact.

    There are other companies make ARM-based platform, some locate in Taiwan. However, most of

    them have not FPGA board accessories, although the prices are much lower.

    2 Proposed Schedule for PHY Development

The following table is the proposed schedule for PHY development (NTHU carry out). Please note

    no RF module schedule is set due to the status is still un-clear.

    Task Description From ~To Bench Mark Individual Study spec (Section 8.4) and give 8/01/06 ~ Every member has a Module presentations. (The partition of the design 10/31/06 set of complete Development should be re-considered again) (3 months) documents as a tutorial (Ph.D × 2 + Code the design in Verilog for those 11/1/06 ~ 8/31/07 Every design passes Master × 6) deterministic modules and in System C (10 months) the local simulation. A

    for those algorithm-based modules first, detail design note is

    and then Verilog followed. also available and

    approved by J.M. and

    J.C. 2 journal papers

    are issued. SoC Study the channel model and give 8/01/06 ~ 9/30/06 A set of complete Integration presentations (2 months) slides as a tutorial (Ph.D × 2) Develop the PHY SoC test bench and test 2/01/07 ~ 5/31/07 A detail design note is

    vectors in System C (4 months) available and approved

    by J.M. and J.C. 1

    journal or conference

    paper is issued

    Integrate all individual modules into an 6/1/07 ~ 8/31/07 Pass all the SoC test

    PHY SoC (3 months) vectors. FPGA Download the PHY SoC design 8/01/07 ~ Pass all test scenarios Verification developed previously into FPGA, perform 11/30/07 designated by the (Ph.D × 1 + combinatorial tests with MAC. (4 months) MAC.

Master × 2)

    Synthesis Write the synthesis scripts while FPGA 10/1/07 ~ Pass timing analysis

    verification is on going. 10/31/07 and pre-simulation Place & Route Write the P&R scripts and complete the 11/01/07 ~ Pass timing analysis

    whole process 1/31/08 and post-simulation LVS, DRC 2/1/08 ~ 2/28/08 Pass the tool check FAB + 3/01/08 ~ 5/15/08 10 samples Package

    Chip Test Complete the chip test on the environment 5/16/08 ~ 7/15/08

    which performs FPGA tests

    ISSCC paper Write the paper for 2009 ISSCC 7/15/08 ~ 9/15/08 Issue to 2009 ISSCC

2.1 Schedule - Study Specification and Give Presentation (8/1 ~ 10/30)

The specification of OFDMA-based mobile WiMAX is much more tedious than that of

    OFDM-based fixed WiMAX (297 pages vs. 66 pages). A thorough study is necessary to have a clear





    Presentation 方式及原則:

    1. 不宜用 Power Point (無法置放大圖表), 宜用 WORD.

    2. 將瞭解的部分, 換成簡潔清晰的英文或中文, 條列式的表達.(類似 Power Point 的表


    3. 努力查詢後, 不瞭解的部分, 用其他顏色標註.

    4. 對於太 trivial 的部分(8.4.5), 不必交代的太 detail, 但要說明其功能及在系統中的意


    Topics Presentation Date Person in Charge 8.4.1 Introduction 8.4.2 OFDMA symbol description 8.4.3 OFDMA basic terms definition 8.4.4 Frame structure 8/16/2006 吳秋萍 8.4.6 OFDMA subcarrier allocation Downlink

    (31 pages)

     8.4.6 OFDMA subcarrier allocation Uplink 8/23/2006 Lacey Optional reduced AAS private map

    (29 pages) (陳蕙如) 8.4.7 OFDMA ranging 8/30/2006 Jesse Chou 8.4.8 Transmit Diversity Space-Time Coding (周哲琛) (48 pages)

    8.4.9 Channel coding

     8.4.10 Control mechanism

     8.4.11 Channel quality measurement

    9/13/2006 Jesse Chou 8.4.12 Transmitter requirement

    8.4.13 Receive requirement (周哲琛) 8.4.14 Frequency control requirement

    8.4.15 Optional HARQ support (37 pages)

    8.4.5 Map message fields and IEs 9/20/2006 ~

    (35 pages) C.J.


    8.4.5 Map message fields and IEs

    9/27/2006 ~ 翁志宏 (35 pages)

    8.4.5 Map message fields and IEs Hotdog

    10/04/2006 ~

    (侯俊宇) (35 pages)

    8.4.5 Map message fields and IEs

    10/11/2006 ~

     Alan (35 pages)


    2.2 Schedule Study Channel Modeling and Give Presentation (8/1 ~ 9/30)

     2. ITU model

    Material: 3. Papers

    1. Available specifications for mobile WiMAX (Topics Presentation Date Person in Charge Introduction to channel model 10/18 SeaStar of mobile WiMAX


2.3 Schedule Discussion of MAC-PHY interface

    Topics Presentation Date Person in Charge MAC-PHY interface 10/19 ~ 10/31, 2 meetings All discussion with NTU (Jesse is the contact person)

    超大型積體電路設計實資電 326黃稚 09510CS T2T3T4 3 90 積體電路設計學29 512100 Workshop in VLSI Design

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