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src_my_two_num.v

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src_my_two_num.v

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     Date: November 12, 2010

     src/my_two_num.v

     Project: my_two_num

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     /****************************************************** 功能,从099计数?

    并且消隐无效的零?计数时间可调

    *******************************************************/ module

    my_two_num(clk,rst,sm_bit,sm_seg); input clk,rst; output[3:0] sm_bit; output[7:0] sm_seg; //时钟模块reg[23:0] counter; always@(posedge clk) if(rst) counter <= 24'b0; else counter <= counter + 24'b1; //时钟模块1parameter max1=25_000_000; //根据公

    1N=(1s*50MHz)/2=25_000_000; reg clk_1s; reg[31:0] counter1; always@(posedge clk) //clk = 50MHz begin if(counter1==max1) //设置分频系数N 产生需要的频率 begin clk_1s

    <= ~clk_1s; // T(clock) = 1s counter1 <= 0; end else counter1 <= counter1 + 1'b1; end //reg[3:0] SH,SL; always@(posedge clk_1s or posedge rst) begin if(rst) {SH,SL}<=8'h00; else if(SL==9) begin if((SH==9)&&(SL==9)) {SH,SL}<=8'h00; else begin SH<=SH+4'b1; SL<=4'b0; end end else if(SL<9) SL<=SL+4'b1; end /******************************************************* 四位数码管, _ _ _ _

     Page 1 of 3 Revision: my_two_num

     Date: November 12, 2010

     src/my_two_num.v

     Project: my_two_num

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     |_| |_| |_| |_| |_|. |_|. |_|. |_|. COM1 COM2 COM3 COM4 | | | | PIN: 42 40 31 28 寄存器: SH SL ********************************************************/ //位选

    进程//注,低电平有效 reg[3:0] sm_bit; always@(counter[17]) begin if({SH,SL}<=8'h09) sm_bit <= ~4'b0001;//>COM4 else begin case(counter[17]) 0: sm_bit <= ~4'b0010;//>COM3 1: sm_bit <= ~4'b0001;//>COM4 endcase end end

    /************************************************************* 功能,将寄存器中的

    所要显示的数据?送至对应控制的位 bcd_in[15:0] 0000 _ 0000 _ 0000 _ 0000 | | | |

    应控制的位:COM1 COM2 COM3 COM4

    *************************************************************** / reg [3:0] bcd; always@(counter[17] or SL) begin if({SH,SL}<=8'h09) bcd <= SL[3:0];// else case(counter[17]) 0: bcd <= SH[3:0];// 1: bcd <= SL[3:0];// endcase end //reg [7:0] sm_seg; always@(bcd) begin case(bcd) 4'h0 : sm_seg <= 8'h28;//> display 0 4'h1 : sm_seg <= 8'hEB;//> display 1

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     Date: November 12, 2010

     src/my_two_num.v

     Project: my_two_num

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     4'h2 4'h3 4'h4 4'h5 4'h6 4'h7 4'h8 4'h9 4'hA 4'hB 4'hC 4'hD 4'hE 4'hF endcase end endmodule

     : : : : : : : : : : : : : :

     sm_seg sm_seg sm_seg sm_seg sm_seg sm_seg sm_seg sm_seg sm_seg sm_seg sm_seg sm_seg sm_seg sm_seg

     <= <= <= <= <= <= <= <= <= <= <= <= <= <=

     8'h32;//> 8'hA2;//> 8'hE1;//> 8'hA4;//> 8'h24;//> 8'hEA;//> 8'h20;//> 8'hA0;//> 8'h60;//> 8'h25;//> 8'h3C;//> 8'h23;//> 8'h34;//> 8'h74;//>

     display display display display display display display display display display display display display display

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     Revision: my_two_num

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