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ICM7211

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ICM7211

ICM7211, ICM7212

4-Digit, ICM7211 (LCD) and

August 1997 ICM7212 (LED) Display Drivers

Features ICM7211 (LCD) Description

? Four Digit Non-Multiplexed 7 Segment LCD Display The ICM7211 (LCD) and ICM7212 (LED) devices constitute

Outputs with Backplane Driver a family of non-multiplexed four-digit seven-segment CMOS

display decoder-drivers. ? Complete Onboard RC Oscillator to Generate Backplane

The ICM7211 devices are con?gured to drive conventional Frequency

LCD displays by providing a complete RC oscillator, divider ? Backplane Input/Output Allows Simple Synchronization chain, backplane driver, and 28 segment outputs. of Slave-Devices to a Master The ICM7212 devices are con?gured to drive common- ? ICM7211 Devices Provide Separate Digit Select Inputs to anode LED displays, providing 28 current-controlled, low Accept Multiplexed BCD Input (Pinout and Functionally leakage, open-drain N-Channel outputs. These devices Compatible with Siliconix DF411) provide a brightness input, which may be used at normal

? ICM7211M Devices Provide Data and Digit Address logic levels as a display enable, or with a potentiometer as a

continuous display brightness control. Latches Controlled by Chip Select Inputs to Provide a

Direct High Speed Processor Interface These devices are available with multiplexed or microproces-

? ICM7211 Decodes Binary to Hexadecimal; ICM7211A sor input con?gurations. The multiplexed versions provide four

data inputs and four Digit Select inputs. This con?guration is Decodes Binary to Code B (0-9, Dash, E, H, L, P, Blank) suitable for interfacing with multiplexed BCD or binary output ? ICM7211A Available in Surface Mount Package devices, such as the ICM7217, ICM7226, and ICL7135. The microprocessor versions provide data input latches and Digit

Features ICM7212AM (LED) Address latches under control of high-speed Chip Select

inputs. These devices simplify the task of implementing a ? 28 Current-Limited Segment Outputs Provide 4-Digit cost-effective alphanumeric seven-segment display for micro- Non-Multiplexed Direct LED Drive at >5mA Per Segment processor systems, without requiring extensive ROM or CPU

time for decoding and display updating. ? Brightness Input Allows Direct Control of LED

Segment Current with a Single Potentiometer or The standard devices will provide two different decoder Digitally as a Display Enable con?gurations. The basic device will decode the four bit

binary inputs into a seven-segment alphanumeric hexadeci- ? ICM7212AM Device Provides Same Input Con:guration

mal output. The “A” versions will provide the “Code B” output and Output Decoding Options as the ICM7211AM

code, i.e., 0-9, dash, E, H, L, P, blank. Either device will cor-

rectly decode true BCD to seven-segment decimal outputs.

Ordering Information

DISPLAY DISPLAY INPUT DISPLAY DRIVE TEMP. TYPE DECODING INTERFACING TYPE RANGE (oC) PART NUMBER PACKAGE PKG. NO.

ICM7211lPL LCD Hexadecimal Multiplexed Direct Drive -40 to 85 40 Ld PDIP E40.6

ICM7211MlPL LCD Hexadecimal Microprocessor Direct Drive -40 to 85 40 Ld PDIP E40.6

ICM7211AlPL LCD Code B Multiplexed Direct Drive -40 to 85 40 Ld PDIP E40.6

ICM7211AMlPL LCD Code B Microprocessor Direct Drive -40 to 85 40 Ld PDIP E40.6

ICM7211AlM44 LCD Code B Multiplexed Direct Drive -40 to 85 44 Ld MQFP Q44.10x10

ICM7211AMlM44 LCD Code B Microprocessor Direct Drive -40 to 85 44 Ld MQFP Q44.10x10

ICM7212AMlPL LED Code B Microprocessor Common Anode -40 to 85 40 Ld PDIP E40.6

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. File Number 3158.1http://www.intersil.com or 407-727-9207 | Copyright ? Intersil Corporation 1999

9-6

    ICM7211, ICM7212

    Pinouts

    ICM7211, ICM7211A ICM7211M, ICM7211AM

    (PDIP) (PDIP) TOP VIEW TOP VIEW

     40 d1 40 d1 VDD 1 VDD 1

    39 c1 e1 2 e1 2 39 c1 g1 3 38 b1 g1 3 38 b1 f1 4 37 a1 f1 4 37 a1 BP 5 36 OSC BP 5 36 OSC a2 6 a2 6 35 VSS 35 VSS b2 7 34 D4 34 CHIP SELECT 2 b2 7

    DIGIT 33 D3 33 CHIP SELECT 1 c2 8 c2 8 SELECT 32 D2 32 DIGIT ADRESS BIT 2 d2 9 d2 9 INPUTS 31 D1 31 DIGIT ADRESS BIT 1 e2 10 e2 10

    30 B3 30 B3 g2 11 g2 11

    29 B2 29 B2 f2 12 f2 12 DATA DATA

    28 B1 INPUTS 28 B1 INPUTS a3 13 a3 13

    27 B0 27 B0 b3 14 b3 14

     f4 26c3 15 f4 c3 15 26

    d3 16 25 g4 d3 16 25 g4 e3 17 24 e4 e3 17 24 e4 g3 18 23 d4 g3 18 23 d4 f3 19 22 c4 f3 19 22 c4 a4 20 21 b4 a4 20 21 b4

     ICM7212AM (PDIP)

    TOP VIEW

     40 d1 VDD 1

    e1 2 39 c1

    g1 3 38 b1

    f1 4 37 a1

    BRT 5 36 VSS

    a2 6 35 VSS

    34 CHIP SELECT 2 b2 7

    33 CHIP SELECT 1 c2 8

    32 DIGIT ADRESS BIT 2 d2 9

    31 DIGIT ADRESS BIT 1 e2 10

    30 B3 g2 11

     29 B2 f2 12 DATA 28 B1 INPUTSa3 13 27 B0 b3 14 26 f4 c3 15 d3 16 25 g4 e3 17 24 e4 g3 18 23 d4

     f3 19 22 c4 a4 20 21 b4

     9-7

     BP

    ICM7211, ICM7212

     (Continued) Pinouts NC ICM7211A NC (MQFP) TOP VIEW

     1 1 1 1 1 DD 1 1 fdcbaeVgOSC

     44 43 42 41 40 39 38 37 36 35 34 a2 1 VSS 33 2 b2 D4 32 DIGIT 3 c2 D3 31 SELECT 4 d2 30 D2 INPUTS 5 29 D1 e2

     6 NC NC 28 B3 7 27 g2 8 26 B2 f2 NC DATA VINPUTS 25 B1 9 d3

    10 24 B0 b3

    11 23 4 fc3 12 13 14 15 16 17 18 19 20 21 22

     OSC 3 3 3 3 4 4 4 4 4 4 f eacedgbdg

     ICM7211AM (MQFP)

    TOP VIEW

     1 1 1 1 1 DD 1 1 caBP fdbge

     44 43 42 41 40 39 38 37 36 35 34 a2 1 VSS 33 2 CHIP SELECT 2 b2 32 NC 3 CHIP SELECT 1 c2 31

    DIGITAL ADRESS BIT 2 4 d2 30

    DIGITAL ADRESS BIT 1 5 29 e2

    NC 6 NC 28

    7 B3 27 g2

    26 8 B2 f2 DATA INPUTS 25 9 B1 d3

    24 10 B0 b3

    11 23 f4c3 12 13 14 15 16 17 18 19 20 21 22

     3 3 3 3 4 4 4 4 4 4 feacedgbdg

    9-8

ICM7211, ICM7212

Functional Block Diagrams ICM7211A

D4 D3 D2 D1 SEGMENT OUTPUTS SEGMENT OUTPUTS SEGMENT OUTPUTS SEGMENT OUTPUTS

7 WIDE DRIVER 7 WIDE DRIVER 7 WIDE DRIVER 7 WIDE DRIVER

7 WIDE LATCH EN 7 WIDE LATCH EN 7 WIDE LATCH EN 7 WIDE LATCH EN

PROGRAMMABLE PROGRAMMABLE PROGRAMMABLE PROGRAMMABLE 4 TO 7 DECODER 4 TO 7 DECODER 4 TO 7 DECODER 4 TO 7 DECODER

DATA INPUTS

DIGIT SELECT INPUTS BLACKPLANE OSCILLATOR DRIVER 19kHz 128 OSCILLATOR FREE-RUNNING ENABLE BP INPUT/OUTPUT INPUT

ENABLE DIRECTOR

ICM7211AM D4 D3 D2 D1 SEGMENT OUTPUTS SEGMENT OUTPUTS SEGMENT OUTPUTS SEGMENT OUTPUTS 7 WIDE DRIVER 7 WIDE DRIVER 7 WIDE DRIVER 7 WIDE DRIVER 7 WIDE LATCH EN 7 WIDE LATCH EN 7 WIDE LATCH EN 7 WIDE LATCH EN PROGRAMMABLE PROGRAMMABLE PROGRAMMABLE PROGRAMMABLE 4 TO 7 DECODER 4 TO 7 DECODER 4 TO 7 DECODER 4 TO 7 DECODER

4-BIT DATA LATCH INPUTS ENABLE

2-BIT DIGIT 2-BIT 2 TO 4 LATCH ADRESS DECODER INPUT ENABLE

CHIP ONE SELECT 1 SHOT CHIP BLACKPLANE OSCILLATOR SELECT 2 DRIVER 19kHz 128 FREE-RUNNING ENABLE OSCILLATOR BP INPUT/OUTPUT INPUT ENABLE DIRECTOR

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ICM7211, ICM7212

(Continued) Functional Block Diagrams ICM7212AM D4 D3 D2 D1 SEGMENT OUTPUTS SEGMENT OUTPUTS SEGMENT OUTPUTS SEGMENT OUTPUTS 7 WIDE DRIVER 7 WIDE DRIVER 7 WIDE DRIVER 7 WIDE DRIVER BRIGHTNESS 7 WIDE LATCH EN 7 WIDE LATCH EN 7 WIDE LATCH EN 7 WIDE LATCH EN PROGRAMMABLE PROGRAMMABLE PROGRAMMABLE PROGRAMMABLE 4 TO 7 DECODER 4 TO 7 DECODER 4 TO 7 DECODER 4 TO 7 DECODER 4-BIT DATA LATCH INPUTS ENABLE

2-BIT DIGIT 2-BIT 2 TO 4 ADRESS LATCH DECODER INPUT ENABLE CHIP ONE SELECT 1 SHOT CHIP SELECT 2

9-10

    ICM7211, ICM7212

    Absolute Maximum Ratings Thermal Information

    Thermal Resistance (Typical, Note 2) Supply Voltage (VDD - VSS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.5V JA (oC/W) Input Voltage (Any Terminal) (Note 1) . . VSS - 0.3V to VDD , + 0.3V PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60

    MQFP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 oC Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150Operating Conditions Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC Maximum Lead Temperature (Soldering, 10s) . . . . . . . . . . . . 300oC (MQFP - Lead Tips Only) CAUTION: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this speci?cation is not implied. NOTES:

    1. Due to the SCR structure inherent in the CMOS process, connecting any terminal to voltages greater than VDD or less than VSS may cause destructive device latchup. For this reason, it is recommended that no inputs from external sources not operating on the same power supply be applied to the device before its supply is established, and that in multiple supply systems, the supply to the ICM7211 and ICM7212 be turned on ?rst.

    2.;!JA is measured with the component mounted on an evaluation PC board in free air.

     Electrical Specications

    PARAMETER TEST CONDITIONS MIN TYP MAX UNITS ICM7211 CHARACTERISTICS (LCD) VDD = 5V;?10%, TA = 25oC, VSS = 0V Unless Otherwise Specified

    3 5 6 V Operating Supply Voltage Range (VDD - VSS), VSUPPLY

    Test circuit, Display blank - 10 50 A Operating Current, IDD

    Pin 36 - 2 10 A Oscillator Input Current, IOSCI

    - 0.5 - s CL = 200pF Segment Rise/Fall Time, tr , tf

    1.5 - - s Backplane Rise/Fall Time, tr , tf CL = 5000pF

    19 - kHz Pin 36 Floating - Oscillator Frequency, fOSC

    Pin 36 Floating 150 - - Hz Backplane Frequency, fBP

    ICM7212 CHARACTERISTICS (Common Anode LED)

    4 5 6 V Operating Supply Voltage Range (VDD - VSS), VSUPPLY

    - 10 50 A Operating Current Display Off, ISTBY Pin 5 (Brightness), Pins 27-34 VSS

    - 200 - mA Operating Current, IDD Pin 5 at VDD , Display all 8s

    - Segment Off 0.01 1 A Segment Leakage Current, ISLK

    5 8 - mA Segment On, VO = +3V Segment On Current, ISEG

    INPUT CHARACTERISTICS (ICM7211 and ICM7212)

    4 - - V Logical 1 Input Voltage, VIH

    - - 1 V Logical 0 Input Voltage, VIL

    Pins 27-34 - 1 A 0.01 Input Leakage Current, IILK

    Pins 27-34 pF - 5 Input Capacitance, ClN

    - 0.01 A Measured at Pin 5 with Pin 36 at VSS 1 BP/Brightness Input Leakage, IBPLK

    - pF - 200 All Devices BP/Brightness Input Capacitance, CBPI

    AC CHARACTERISTICS - MULTIPLEXED INPUT CONFIGURATION

    1 - - Refer to Timing Diagrams s Digit Select Active Pulse Width, tWH

    500 - - ns Data Setup Time, tDS

    200 - - ns Data Hold Time, tDH

    2 - - s Inter-Digit Select Time, tIDS

    AC CHARACTERISTICS - MICROPROCESSOR INTERFACE

    200 - - ns Other Chip Select Either Held Active, Chip Select Active Pulse Width, tWL or Both Driven Together

    100 - - ns Data Setup Time, tDS

    10 0 - ns Data Hold Time, tDH

    2 - - s Inter-Chip Select Time, tICS

     9-11

    ICM7211, ICM7212

Input Denitions In this table, VDD and VSS are considered to be normal operating input logic levels. Actual input low and high levels are speci?ed under Operating Characteristics. For lowest power consumption, input signals should swing over the full supply.

    INPUT TERMINAL CONDITIONS FUNCTION 27 B0 Ones (Least Significant) VDD = Logical One

    VSS = Logical Zero

    B1 28 Twos VDD = Logical One

    SS = Logical Zero V Data Input Bits B2 29 Fours VDD = Logical One

    VSS = Logical Zero

    B3 30 Eights (Most Significant) VDD = Logical One

    VSS = Logical Zero

    OSC (LCD Devices 36 Floating or with External Oscillator Input Only) Capacitor to VDD Disables BP output devices, allowing segments to be synchronized to VSS an external signal input at the BP terminal (Pin 5).

ICM7211 Multiplexed-Binary Input Conguration

    INPUT TERMINAL CONDITIONS FUNCTION

    D1 31 D1 Digit Select (Least Significant) VDD = Inactive

    D2 32 D2 Digit Select VSS = Active

    D3 33 D3 Digit Select

    D4 34 D4 Digit Select (Most Significant)

    ICM7211M/ICM7212M Microprocessor Interface Input Conguration INPUT DESCRIPTION TERMINAL CONDITIONS FUNCTION

    DA1 Digit Address 31 DA1 and DA2 serve as a 2-bit Digit Address Input DD = Logical One VBit 1 (LSB) DA2, DA1 = 00 selects D4 VSS = Logical Zero DA2, DA1 = 01 selects D3 Digit Address DA2 32 VDD = Logical One DA2, DA1 = 10 selects D2 Bit 2 (MSB) VSS = Logical Zero DA2, DA1 = 11 selects D1 When both CS1 and CS2 are taken low, the data at the Data CS1 Chip Select 1 33 VDD = Inactive and Digit Select code inputs are written into the input latches. VSS = Active On the rising edge of either Chip Select, the data is decoded CS2 Chip Select 2 34 VDD = Inactive and written into the output latches. VSS = Active

    Timing Diagrams

     IDS tWH tIDS tDIGIT SELECT DN-1 tDH

    DIGIT SELECT

    DN

     DATA VALID DATA VALID DN-1 DN

    tDS

    FIGURE 1. MULTIPLEXED INPUT

     CS1 (CS2)

    tICS WI tCS2 (CS1) tDH tDS DATA AND DIGIT ADDRESS = DONT CARE

    FIGURE 2. MICROPROCESSOR INTERFACE INPUT

     9-12

    ICM7211, ICM7212

    Typical Performance Curves

     30 180 o o T = 25 T = 25 C C A A 25 150 C = 0pF C = 0pF (PIN 36 (PIN 36 20 120 C = C = OSOS C C 15 90

     10 60 C = C = OSC OSC 5 30

     0 o o 1 2 3 4 5 6 1 2 3 4 5 6 7 PI5 AT V , T = C PI5 AT V , T = C 25 25 DA DA D D VSUPP (V) SUPP (V) VN N

    V = 6V V = 6V FIGURE 3. ICM7211 OPERATING SUPPLY CURRENT AS A FIGURE 4. ICM7211 BACKPLANE FREQUENCY AS A SUPP SUPP FUNCTION OF SUPPLY VOLTAGE FUNCTION OF SUPPLY VOLTAGE

     V = 5V V = 5V 15 12 o T = 25 C A V = V = SUPSUP 10 4V 4V P P C = 0pF (PIN 36 10 8 C = OS C 6 LC LC

     D D PIN PIN 5 4 o o T = -20 C T = -20 C A A C = OSC 2 o o T = 25 T = 25 A A C C 0 0 o 1 2 3 4 5 6 0 1 2 3 4 5 6 PI5 AT V , T = C 25 DA D VO (V) VOLTAGE ON BRT PIN 5 (V) N o o T C T C V = 6V = 70 FIGURE 5. ICM7212 LED SEGMENT CURRENT AS A FIGURE 6. ICM7212 LED SEGMENT CURRENT AS A = 70 A A SUPP FUNCTION OF OUTPUT VOLTAGE FUNCTION OF BRIGHTNESS CONTROL VOLTAGE V = 5V 1800 LE AL LE AL LE LE D L D L o o D D V = 1.7VPIN 5 AT V , T = 25 C V = 1.7VPIN 5 AT V , T = 25 C V = 1500 DD A DD A SUP, , 4V P 1200

     900 LC D PIN 600 o T = -20 C A 300 o T = 25 A C 0 AT +3V AT +3V 4 5 6 o o T = T = 25 C 25 C A A VSUPP (V) o T C FIGURE 7. ICM7212 OPERATING POWER (LED DISPLAY) AS A FUNCTION OF SUPPLY VOLTAGE = 70 A LE AL 9-13 LE D L o D V = 1.7VPIN 5 AT V , T = 25 C DD A ,

I

     (Hz) (A) IBPOP;

    POWER (mW)

     o T = 25 C A

     C = 0pF (PIN 36 C = OS C (mA) (mA) SEG SEG

     C = OSC

    o PI5 AT V , T = C 25 DA D N

    V = 6V SUPP

     V = 5V o T = 25 C A V = SUP4V P C = 0pF (PIN 36 C = OS C LC D PIN Io T = -20 C A C = OSC o T = 25 A C o PI5 AT V , T = C 25 DA D N o T C V = 6V = 70 SUPP A

     V = 5V

    LE AL LE D L o D V = 1.7VPIN 5 AT V , T = 25 C V = SUPDD A 4V , P

    ICM7211, ICM7212

     Description Of Operation OSCILLATOR FREQUENCY LCD Devices 128 CYCLES BACKPLANE The LCD devices in the family (ICM7211, ICM7211A, INPUT/OUTPUT ICM7211M, ICM7211AM) provide outputs suitable for driving 64 CYCLES conventional four-digit, seven-segment LCD displays. These 64 CYCLES OFF devices include 28 individual segment drivers, backplane SEGMENTS driver, and a self-contained oscillator and divider chain to generate the backplane frequency. ON SEGMENTS The segment and backplane drivers each consist of a CMOS inverter, with the N-Channel and P-Channel devices FIGURE 8. DISPLAY WAVEFORMS ratioed to provide identical on resistances, and thus equal rise and fall times. This eliminates any DC component, which LED Devices could arise from differing rise and fall times, and ensures

    The LED device in the family (ICM7212AM) provides outputs maximum display life.

    suitable for directly driving four-digit, seven-segment The backplane output devices can be disabled by connect- common-anode LED displays. These devices include 28 ing the OSCillator input (pin 36) to VSS. This allows the 28 individual segment drivers, each consisting of a low-leakage, segment outputs to be synchronized directly to a signal input current-controlled, open-drain, N-Channel transistor. at the BP terminal (pin 5). In this manner, several slave devices may be cascaded to the backplane output of one The drain current of these transistors can be controlled by master device, or the backplane may be derived from an varying the voltage at the BRtrighTness input (pin 5). The volt- external source. This allows the use of displays with charac- age at this pin is transferred to the gates of the output devices ters in multiples of four and a single backplane. A slave for on segments, and thus directly modulates the transistors device represents a load of approximately 200pF (compara- on resistance. A brightness control can be easily imple- ble to one additional segment). Thus the limitation of the mented with a single potentiometer controlling the voltage at number of devices that can be slaved to one master device pin 5, connected as in Figure 9. The potentiometer should be backplane driver is the additional load represented by the a high value (100k to 1M) to minimize power consumption, larger backplane of displays of more than four digits. A good which can be signi?cant when the display is off. rule of thumb to observe in order to minimize power con- sumption is to keep the backplane rise and fall times less VDD (LED ANODES) than about 5s. The backplane output driver should handle the backplane to a display of 16 one-half inch characters. It BRIGHTNESS 100k TO 1M?;is recommended, if more than four devices are to be slaved PIN 5 together, the backplane signal be derived externally and all the ICM7211 devices be slaved to it. This external signal should be capable of driving very large capacitive loads with short (1 - 2s) rise and fall times. The maximum frequency for a backplane signal should be about 150Hz although this FIGURE 9. BRIGHTNESS CONTROL may be too fast for optimum display response at lower dis- The brightness input may also be operated digitally as a dis- play temperatures, depending on the display type. play enable; when high, the display is fully on, and low fully The onboard oscillator is designed to free run at approxi- off. The display brightness may also be controlled by varying mately 19kHz at microampere current levels. The oscillator the duty cycle of a signal swinging between the two voltages frequency is divided by 128 to provide the backplane fre- at the brightness input. quency, which will be approximately 150Hz with the oscillator free-running; the oscillator frequency may be reduced by Note that the LED device has two connections for VSS ; both connecting an external capacitor between the OSCillator ter- of these pins should be connected. The double connection is

    necessary to minimize effects of bond wire resistance with minal and VDD. the large total display currents possible. The oscillator may also be overdriven if desired, although care When operating LED devices at higher temperatures and/or must be taken to ensure that the backplane driver is not dis- higher supply voltages, the device power dissipation may abled during the negative portion of the overdriving signal need to be reduced to prevent excessive chip temperatures. (which could cause a DC component to the display). This can The maximum power dissipation is 1W at 25oC, derated lin- be done by driving the OSCillator input between the positive early above 35oC to 500mW at 70oC (-15mW/ oC above supply and a level out of the range where the backplane disable 35oC). Power dissipation for the device is given by: is sensed (about one ?fth of the supply voltage above VSS). Another technique for overdriving the oscillator (with a signal P = (VSUPP - VFLED)(lSEG)(nSEG) swinging the full supply) is to skew the duty cycle of the over- driving signal such that the negative portion has a duration where VFLED is the LED forward voltage drop, ISEG is shorter than about one microsecond. The backplane disable segment current, and nSEG is the number of on segments. sensing circuit will not respond to signals of this duration. It is recommended that if the device is to be operated at

    9-14

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