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# k'n1(W/L)104mA/V2

By Dennis Perez,2014-06-19 11:26
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k'n1(W/L)1=0.4mA/V2, k'n2(W/L)2= k'n3(W/L)3= k'n4(W/L)4=0.2mA/V2, and Vtn1= Vtn2= Vtn3= Vtn4=1V. Find the values of VGS1, VGS2, VGS3, VGS4, VDS2, and IQ. Find the range of RD. ......

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4, find 1. The noninverting op amp configuration shown in Fig. 1 provides a direct implementation of the R/R to obtain a closed-loop voltage gain A of 10. (c) What is the amount of feedback in decibels? (d) 21ffeedback loop of Fig. 2. (a) Assume that the op amp has infinite input resistance and zero output If V = 1V, find V, V, and V. (e) If A decreases by 20%, what is the corresponding decrease in A? sofif resistance. Find an expression for the feedback factor β. (b) If the open-loop voltage gain A = 10

(20%)

2. Figure 3 shows a modified version of the difference amplifier. The modified circuit includes a resistor

R, which can be used to vary the gain. Find the differential voltage gain, v/v . Go d

[Hint: The virtual short circuit at the op amp input causes the current through the R resistors to be v/2R.] 1d 1

(10%)

3. Design an op amp circuit to provide an output v= [3v+(v/2)]. Choose relatively low values of o12

resistors but ones for which the input current (from each input signal source) does not exceed 0.1 mA for

2-V input signals. (10%)

4. For the circuit in Fig. 4, derive an expression for the transfer function V(s)/V(s). Find the dc gain and oi

the 3-dB frequency. Design the circuit to obtain a dc gain of 40 dB, a 3-dB frequency of 1 kHz, and an

input resistance of 1 kΩ. At what frequency does the magnitude of transmission become unity? What is

the phase angle at this frequency ? (20%)

5. For the common-emitter amplifier of Fig. 5, neglect r and r, and assume the current source to be ideal. xo

(a) Derive an expression for the midband gain. (b) Derive expressions for the frequencies of the poles.

Where are the zeros located? (c) Given an expression for the amplifier voltage gain A(s). (d) For

R=R=R=10kΩ, β=100, and I=1mA, find the value of the midband gain. (e) Select values for C and sCLE

C to place the two poles a decade apart and to obtain a lower 3-dB frequency of 100Hz while C

minimizing the total capacitance. (f) Sketch a Bode plot for the gain magnitude, and estimate the

frequency at which the gain becomes unity. (g) Find the phase shift at 100Hz. (20%)

26. For the circuit shown in Fig. 6, the transistor parameters are: kn(W/L)=0.4mA/V, kn(W/L)= 1122

2kn(W/L)= kn(W/L)=0.2mA/V, and V= V= V= V=1V. Find the values of V, V, V, 3344tn1tn2tn3tn4GS1GS2GS3

V, V, and I. Find the range of R. (20%) GS4DS2QD

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Fig. 1

Fig. 2

Fig. 3

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Fig. 5 Fig. 4

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Fig. 6

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