Controller Area Network (CAN)
Is a high-integrity serial data communications bus for real-time applications Operates at data rates of up to 1 Megabits per second
Has excellent error detection and confinement capabilities
Was originally developed by Bosch for use in cars
Is now being used in many other industrial automation and control applications Is an international standard: ISO 11898
The Controller Area Network (CAN) is a serial communications protocol which efficiently supports distributed realtime control with a very high level of security.
Its domain of application ranges from high speed networks to low cost multiplex wiring.In automotive electronics, engine control units, sensors, anti-skid-systems, etc. are connected using CAN with bitrates up to 1 Mbit/s. At the same time it is cost effective to build into vehicle body electronics, e.g. lamp clusters, electric windows etc. to replace the wiring harness otherwise required.
The intention of this specification is to achieve compatibility between any two CAN implementations. Compatibility, however, has different aspects regarding e.g. electrical features and the interpretation of data to be transferred. To achieve design transparency and implementation flexibility CAN has been subdivided into different layers.
• the (CAN-) object layer
• the (CAN-) transfer layer
• the physical layer
The object layer and the transfer layer comprise all services and functions of the data link layer defined by the ISO/OSI model. The scope of the object layer includes • finding which messages are to be transmitted
• deciding which messages received by the transfer layer are actually to be used,
• providing an interface to the application layer related hardware.
There is much freedom in defining object handling. The scope of the transfer layermainly is the transfer protocol, i.e. controlling the framing, performing arbitration, errorchecking, error signalling and fault confinement. Within the transfer layer it is decidedwhether the bus is free for starting a new transmission or whether a reception is juststarting. Also some general features of the bit timing are regarded as part of thetransfer layer. It is in the nature of the transfer layer that there is no freedom formodifications.
The scope of the physical layer is the actual transfer of the bits between the differentnodes with respect to all electrical properties. Within one network the physical layer, ofcourse, has
to be the same for all nodes. There may be, however, much freedom inselecting a physical layer.
The scope of this specification is to define the transfer layer and the consequences ofthe CAN protocol on the surrounding layers.
The Attributes of CAN
CAN is a serial bus system with multi-master capabilities, that is, all CAN nodes are able to transmit data and several CAN nodes can request the bus simultaneously. The serial bus system with real-time capabilities is the subject of the ISO 11898 international standard and covers the lowest two layers of the ISO/OSI reference model. In CAN networks there is no addressing of subscribers or stations in the conventional sense, but instead, prioritized messages are transmitted. A transmitter sends a message to all CAN nodes (broadcasting). Each node decides on the basis of the identifier received whether it should process the message or not. The identifier also determines the priority that the message enjoys in competition for bus access. The relative simplicity of the CAN protocol means that very little cost and effort need to be expended on personal training; the CAN chips interfaces make applications programming relatively simple. Introductory courses, function libraries, starter kits, host interfaces, I/O modules and tools are available from a variety of vendors permitting low-cost implementation of CAN networks. Low-cost controller chips implementing the CAN data link layer protocol in silicon and permitting simple connection to microcontrollers have been available since 1989. Today there are more than about 50 CAN protocol controller chips from more than 15 manufacturers announced, and available.
CAN has the following properties
• prioritization of messages
• guarantee of latency times
• configuration flexibility
• multicast reception with time synchronization
• system wide data consistency
• error detection and signalling
• automatic retransmission of corrupted messages as soon as the bus is idle again
• distinction between temporary errors and permanent failures of nodes and autonomous switching off of defect nodes
Layered Structure of a CAN Node
- Message Filtering
- Message and Status Handling
- Fault Confinement
- Error Detection and Signalling
- Message Validation
- Message Framing
- Transfer Rate and Timing
- Signal Level and Bit Representation
- Transmission Medium
• The Physical Layer defines how signals are actually transmitted. Within this specification
the physical layer is not defined so as to allow transmission medium and signal level implementations to be optimized for their application.
• The Transfer Layer represents the kernel of the CAN protocol. It presents messages received to the object layer and accepts messages to be transmitted from the object layer. The transfer layer is responsible for bit timing and synchronization, message framing, arbitration, acknowledgment, error detection and signalling, and fault confinement. • The Object Layer is concerned with message filtering as well as status and message handling.
The scope of this specification is to define the transfer layer and the consequences of the CAN protocol on the surrounding layers.
Information on the bus is sent in fixed format messages of different but limited length. When the bus is free any connected unit may start to transmit a new message. Information Routing
In CAN systems a CAN node does not make use of any information about the system configuration (e.g. station addresses). This has several important consequences. System Flexibility: Nodes can be added to the CAN network without requiring any change in the software or hardware of any node and application layer.
Message Routing: The content of a message is named by an IDENTIFIER. The IDENTIFIER does not indicate the destination of the message, but describes the meaning of the data, so that all nodes in the network are able to decide by MESSAGE FILTERING whether the data is to be acted upon by them or not.
Multicast: As a consequence of the concept of MESSAGE FILTERING any number of nodes can receive and simultaneously act upon the same message.
Data Consistency: Within a CAN network it is guaranteed that a message is simultaneously accepted either by all nodes or by no node. Thus data consistency of a system is achieved by the concepts of multicast and by error handling
The speed of CAN may be different in different systems. However, in a given system the bitrate is uniform and fixed.
The IDENTIFIER defines a static message priority during bus access.
Remote Data Request
By sending a REMOTE FRAME a node requiring data may request another node to send the corresponding DATA FRAME. The DATA FRAME and the corresponding REMOTE FRAME are named by the same IDENTIFIER.
When the bus is free any unit may start to transmit a message. The unit with the message of higher priority to be transmitted gains bus access.
Whenever the bus is free, any unit may start to transmit a message. If 2 or more units start transmitting messages at the same time, the bus access conflict is resolved by bitwise arbitration using the IDENTIFIER. The mechanism of arbitration guarantees that neither information nor time is lost. If a DATA FRAME and a REMOTE FRAME with the same IDENTIFIER are initiated at the same time, the DATA FRAME prevails over the REMOTE FRAME. During arbitration every transmitter compares the level of the bit transmitted with the level that is monitored on the bus. If these levels are equal the unit may continue to send. When a ’recessive’ level is sent and a ’dominant’ level is monitored (see Bus Values), the unit has lost arbitration and must withdraw without sending one more bit. Safety
In order to achieve the utmost safety of data transfer, powerful measures for error detection, signalling and self-checking are implemented in every CAN node.
For detecting errors the following measures have been taken:
- Monitoring (transmitters compare the bit levels to be transmitted with the bit levels detected on the bus)
- Cyclic Redundancy Check
- Bit Stuffing
- Message Frame Check
Performance of Error Detection
The error detection mechanisms have the following properties:
- all global errors are detected.
- all local errors at transmitters are detected.
- up to 5 randomly distributed errors in a message are detected.
- burst errors of length less than 15 in a message are detected.
- errors of any odd number in a message are detected.
Total residual error probability for undetected corrupted messages: less than message error rate * 4.7 * 10-11.
Error Signalling and Recovery Time
Corrupted messages are flagged by any node detecting an error. Such messages are aborted and will be retransmitted automatically. The recovery time from detecting an error until the start of the next message is at most 29 bit times, if there is no further error. Fault Confinement
CAN nodes are able to distinguish short disturbances from permanent failures. Defective nodes are switched off.
The CAN serial communication link is a bus to which a number of units may be connected. This number has no theoretical limit. Practically the total number of units will be limited by delay times and/or electrical loads on the bus line.
The bus consists of a single channel that carries bits. From this data resynchronization information can be derived. The way in which this channel is implemented is not fixed in this specification. E.g. single wire (plus ground), two differential wires, optical fibres, etc. Bus values
The bus can have one of two complementary logical values: ’dominant’
or ’recessive’.During simultaneous transmission of ’dominant’ and ’recessive’ bits, the resulting bus value will be ’dominant’. For example, in case of a wired-AND
implementation of the bus, the ’dominant’ level would be represented by a logical ’0’ and the ’recessive’ level by a logical ’1’. Physical states (e.g. electrical voltage, light) that represent the logical levels are not given in this specification.
All receivers check the consistency of the message being received and will acknowledge a consistent message and flag an inconsistent message.
Sleep Mode / Wake-up
To reduce the system’s power consumption, a CAN-device may be set into sleep mode
without any internal activity and with disconnected bus drivers. The sleep mode is finished with a wake-up by any bus activity or by internal conditions of the system. On wake-up, the internal activity is restarted, although the transfer layer will be waiting for the system’s
oscillator to stabilize and it will then wait until it has synchronized itself to the bus activity (by checking for eleven consecutive ’recessive’ bits), before the bus drivers are set to "on-bus" again.
In order to wake up other nodes of the system, which are in sleep-mode, a special wake-up message with the dedicated, lowest possible IDENTIFIER (rrr rrrd rrrr; r =’recessive’ d = ’dominant’) may be used.
1 Error Detection
There are 5 different error types (which are not mutually exclusive):
• BIT ERROR
A unit that is sending a bit on the bus also monitors the bus. A BIT ERROR has to be detected at that bit time, when the bit value that is monitored is different from the bit value that is sent. An exception is the sending of a ’recessive’ bit during the stuffed bit stream of the ARBITRATION FIELD or during the ACK SLOT. Then no BIT ERROR occurs when a ’dominant’ bit is monitored. A TRANSMITTER sending a PASSIVE ERROR FLAG and detecting a ’dominant’ bit does not interpret this as a BIT ERROR.
• STUFF ERROR
A STUFF ERROR has to be detected at the bit time of the 6th consecutive equal bit level in a message field that should be coded by the method of bit stuffing.
• CRC ERROR
The CRC sequence consists of the result of the CRC calculation by the transmitter. The receivers calculate the CRC in the same way as the transmitter. A CRC ERROR has to be detected, if the calculated result is not the same as that received in the CRC sequence. • FORM ERROR
A FORM ERROR has to be detected when a fixed-form bit field contains one or more illegal bits. (Note, that for a Receiver a dominant bit during the last bit of END OR FRAME is not treated as FORM ERROR).
• ACKNOWLEDGMENT ERROR
An ACKNOWLEDGMENT ERROR has to be detected by a transmitter whenever it does not monitor a ’dominant’ bit during the ACK SLOT.
2 Error Signalling
A station detecting an error condition signals this by transmitting an ERROR FLAG.
Foran ’error active’ node it is an ACTIVE ERROR FLAG, for an ’error passive’ node it is a PASSIVE ERROR FLAG. Whenever a BIT ERROR, a STUFF ERROR, a FORM ERROR or an ACKNOWLEDGMENT ERROR is detected by any station, transmission of an ERROR FLAG is started at the respective station at the next bit.Whenever a CRC ERROR is detected, transmission of an ERROR FLAG starts at the bit following the ACK DELIMITER, unless an ERROR FLAG for another condition has already been started. FAULT CONFINEMENT
With respect to fault confinement a unit may be in one of three states: • ’error active’
• ’error passive’
• ’bus off’
An ’error active’ unit can normally take part in bus communication and sends an ACTIVE ERROR FLAG when an error has been detected.
An ’error passive’ unit must not send an ACTIVE ERROR FLAG. It takes part in bus communication, but when an error has been detected only a PASSIVE ERROR FLAG is sent. Also after a transmission, an ’error passive’ unit will wait before initiating a further transmission. (See SUSPEND TRANSMISSION)
A ’bus off’ unit is not allowed to have any influence on the bus. (E.g. output drivers
For fault confinement two counts are implemented in every bus unit:
1) TRANSMIT ERROR COUNT
2) RECEIVE ERROR COUNT
These counts are modified according to the following rules:(note that more than one rule may apply during a given message transfer)
1. When a RECEIVER detects an error, the RECEIVE ERROR COUNT will be increased by 1, except when the detected error was a BIT ERROR during the sending of an ACTIVE ERROR FLAG or an OVERLOAD FLAG.
2. When a RECEIVER detects a ’dominant’ bit as the first bit after sending an ERROR
FLAG the RECEIVE ERROR COUNT will be increased by 8.
3. When a TRANSMITTER sends an ERROR FLAG the TRANSMIT ERROR COUNT is increased by 8.
INCREASING CAN OSCILLATOR TOLERANCE
This section describes an upwards compatible modification of the CAN protocol, as specified in sections 1 to 8.
9.1 Protocol Modifications
In order to increase the maximum oscillator tolerance from the 0.5% currently possible to 1.5%, the following modifications, which are upwards compatible to the existing CAN specification, are necessary:
 If a CAN node samples a dominant bit at the third bit of INTERMISSION, then it will interpret this bit as a START OF FRAME bit.
 If a CAN node has a message waiting for transmission and it samples a dominant bit at the third bit of INTERMISSION, it will interpret this as a START OF FRAME bit, and, with the next bit, start transmitting its message with the first bit of the IDENTIFIER without first transmitting a START OF FRAME bit and without becoming a receiver.
 If a CAN node samples a dominant bit at the eighth bit (the last bit) of an ERROR DELIMITER or OVERLOAD DELIMITER, it will, at the next bit, start transmitting an OVERLOAD FRAME (not an ERROR FRAME). The Error Counters will not be incremented.
 Only recessive to dominant edges will be used for synchronization. In agreement with the existing specification, the following rules are still valid.  All CAN controllers synchronize on the START OF FRAME bit with a hard synchronization.
 No CAN controller will send a START OF FRAME bit until it has counted three recessive bits of INTERMISSION.
This modifications allow a maximum oscillator tolerance of 1.58% and the use of a ceramic resonator at a bus speed of up to 125 Kbits/second. For the full bus speed range of the CAN protocol, still a quartz oscillator is required. The compatibility of the enhanced and the existing protocol is maintained, as long as:
 CAN controllers with the enhanced and existing protocols, used in one and the same network, have all to be provided with a quartz oscillator.
The chip with the highest requirement for its oscillator accuracy determines the oscillator accuracy which is required from all the other nodes. Ceramic resonators can only be used when all the nodes in the network use the enhanced protocol. BIT TIMING REQUIREMENTS
NOMINAL BIT RATE
The Nominal Bit Rate is the number of bits per second transmitted in the absence of resynchronization by an ideal transmitter.
NOMINAL BIT TIME
NOMINAL BIT TIME = 1 / NOMINAL BIT RATE
The Nominal Bit Time can be thought of as being divided into separate non-overlapping time segments. These segments
- SYNCHRONIZATION SEGMENT (SYNC_SEG)
- PROPAGATION TIME SEGMENT (PROP_SEG)
- PHASE BUFFER SEGMENT1 (PHASE_SEG1)
- PHASE BUFFER SEGMENT2 (PHASE_SEG2)
form the bit time as shown in figure 1.
Fig. 1 Partition of the Bit Time
This part of the bit time is used to synchronize the various nodes on the bus. An edge is expected to lie within this segment.
This part of the bit time is used to compensate for the physical delay times within the
network. It is twice the sum of the signal’s propagation time on the bus line, the input comparator delay, and the output driver delay.
PHASE SEG1, PHASE SEG2
These Phase-Buffer-Segments are used to compensate for edge phase errors. These segments can be lengthened or shortened by resynchronization.
The SAMPLE POINT is the point of time at which the bus level is read and interpreted as the value of that respective bit. It’s location is at the end of PHASE_SEG1.
INFORMATION PROCESSING TIME
The INFORMATION PROCESSING TIME is the time segment starting with the SAMPLE POINT reserved for calculation the subsequent bit level.
Length of Time Segments
• SYNC_SEG is 1 TIME QUANTUM long.
• PROP_SEG is programmable to be 1,2,...,8 TIME QUANTA long.
• PHASE_SEG1 is programmable to be 1,2,...,8 TIME QUANTA long.
• PHASE_SEG2 is the maximum of PHASE_SEG1 and the INFORMATION
• The INFORMATION PROCESSING TIME is less than or equal to 2 TIME QUANTA
The total number of TIME QUANTA in a bit time has to be programmable at least from 8 to 25.