DOC

Template+of+EQ

By Margaret Freeman,2014-05-16 03:29
11 views 0
Template+of+EQ

    Template of Engineering Query

    I . Document items

    1. Netlist file

    2. Cant open file

    3. Missing file

    4. What the files are used for? 5. Rev.

    6. Which spec will be used?

    7. One film, but different requirement in another place

    II. Cost & special Material 1. laminate material

    2. laminate core for single side board 3. Solder mask ink material

    4. Other special material

    III. Board Thk & Tol

    1. No specified Board Thk

    2. Unclear meaning on board Thk 3. Lay-up order

    4. Lay-up structure

    IV. Drill layer & hole

    1. Hole type

    2. Mismatched hole chart information 3. Special hole with strange conductor pad 4. Hole Diameter Tol

    5. Press fit hole

    6. Overlapped hole

    7. Too close between hole to board edge 8. Hole quantity

    9. Hole location Tol

    10. Position of stamp hole

    V. Drawing, dimension & Tolerance 1. Outline tolerance

    2. Mismatched dimensions

    3. Missing dimensions

    4. Inner corner size

    5. Asymmetry Tol

    6. Data of hole to edge

    7. Quality & side for Fiducial mark? 8. Direction to arrange unit in array DWG VI. Impedance items

1. Which kind of line?

    2. Impedance value

    3. Coupon line width

    4. Distance between holes in coupon 5. Test point issue

    VII. Cu Thk

    1. PTH hole

    2. Buried hole & blind hole

    3. Surface copper Thk

    VIII. Conductor design

    1. Delete non-functional isolated pads in inner layer

    2. Annular ring

    3. Clearance issue

    4. Isolated line to separate different area in inner layers

    5. Tenting hole issue

    6. Line width/spacing Tol

    7. Strange design

    8. Exposed copper along board edge 9. Plating Gold finger guide line 10. Isolated fiducial mark

    11. Dummy pattern at breakaway area 12. Dummy pattern at blank area in board 13. Fill in the narrow spacing

    14. Similar issue on Made in USA 15. LOGO position & type

    IVIII. Solder mask & Legend film & other (Carbon ink & peel able mask)

    1. Solder mask Thk

    2. Plugged hole items

    3. Solder mask bridge

    4. Exposed line/pad

    5. Solder mask bridge between Gold Finger 6. Distance between the S/M opening edge of via hole/pad and S/M opening of the top of Gold Finger

    7. Extra S/M opening

    8. Missing S/M opening for SMT pad/round pad 9. Component mark bridge

    10. C/M width

    11. Reverse legend

    12. LOGO increase cost

IX. Surface final

    1. No call surface treatment

    2. Rohs requirement

    3. Tighter Thk

4. Feasibility of process

    XI. Fabrication for profile

    1. Rout or Punch

    2. V-cut

    3. G/F bevel

    4. Chamfer

XII. Bow & Twist

    XIII. X-out

    Common Query For Your Reference

    I . Document items

    1. Netlist file

    Question 1: After comparing the customer netlist file with CAD film inputted by our CAD/CAM. Some

    short/open was found. see figxx.

    Suggestion: a)Ingore the netlist file and just follow the CAD data to do.

    b)Please resend the right Gerber file to us. 2. Cant open file

    Question 2: We can’t open the file in the package (see figxx).

    Suggestion: a)Ingore it.

    b)Please resend it to us with other format. 3. Missing file

    Question 3: Missing files called in the Gerber file (see figxx). Suggestion: a)Ingore them.

    b)Please send them to us ASAP.

    4.What the files are used for?

    Question 4: we don’t know what the files called in package used for? (see figxx).

    Suggestion: a)Ingore them.

    b) Please advise.

    5. Rev.

    Question 5: The Rev of customer P/N is different between Rev A in Gerber file and Rev B in mail

    information? (see figxx).

    Suggestion: a)Follow Rev A in Gerber file to do.

    b)Please advise.

    6. Which spec will be used?

    Question 6: Customer don't call fabrication spec for the project. Suggestion: a)We’ll use IPC-A-600G Class 2 & IPC-6012 Class 2 to do..

    b) Please advise.

    7. One film, but different requirement in another place

    Question 7: Customer requires print solder mask on both sides, but there is Top side solder mask film in

    the Gerber. .

    Suggestion: a)Please confirm the one S/M film will be applied to both sides.

    b) Just apply to Top side.

    II. Cost & special Material

    1. laminate material

    Question 1: Customer requires to use xxx laminate core, but we have no this kind of material in store, it’ll

    take long time to order the special material and increase production cycle. Suggestion: To shorten lead-time, we propose to use xxx laminate core from xxx vendor instead of it. Question 2: Customer requires to use xxx laminate core with high Tg (>=170 degree), but we have no this

    kind of material on hand, it’ll take long time to order the special material and increase high cost.

    Suggestion: To reduce cost and shorten lead-time, we propose to use xxx laminate core with normal Tg

    (nominal 140 degree)from xxx vendor instead of it.

    2. laminate core for single side board

    Question 3: Customer call FR-4 material for the single-side board.

    Suggestion: To reduce cost, we propose to use CEM-1/CEM-3 instead of it, please confirm. 3. Solder mask ink material

    Question 4: XXX solder mask ink is required in customer DWG, but we have no the material in stock, and

    it’ll take long time to order it and increase high cost?

    Suggestion: a) To reduce cost and shorten lead-time, we propose to use Green xxx ink from xxx vendor

    instead of it..

    b) Please advise.

    4. Other special material

    Question 5:.For other special material, refer to above EQ to inquire customer to use common cheap

    material instead of it.

    III. Board Thk & Tol

     1. No specified Board Thk

    Question 1: Not specified board Thk & Tol in customer DWG & Spec..

    Suggestion: a)We’ll build the finished board Thk & tol as 1.6+/-0.16mm..

    b) Please advise.

    Question 2: The tolerance of board thk +/-xxx mil is called in customer DWG/Spec, but it’s very tight. If

    meet it, we have to order special material and increase high cost.

    Suggestion: a)To reduce cost, please kindly relax it to +/-10% of board Thk.

    b) If customer insist on it, please MKT reconsider the cost.

     2. Unclear meaning on board Thk

    Question 3: We can’t know whether the board Thickness xxx mil called by customer is finished or

    excluding soldermask?.

    Suggestion: a) Board Thk Xxx mil means total finished board thk..

    b) It just means Thk before plating (or suggest excluding solder mask). 3. Lay-up order

    Question 4: Customer doesn’t define the lay-up order.

    Suggestion: a)We’ll build board per the order of Art1/Art2/Art3/Art4.

    b) Please advise.

     4. Lay-up structure

    Question 5: Based on customer lay-up structure, finished board Thk will be aaa mil, but bbb mil is

    required in DWG/spec, we can’t meet them at the same time.

    Suggestion: a) Follow customer lay-up to do, but finished board Thk will be aaa mil.

    b) Build finished board Thk bbb mil, but allow us to adjust lay-up as shown in attached figxx.

    IV. Drill layer & hole

    1. Hole type

     Question 1: Customer doesn’t define the hole type (PTH or NPTH).

    Suggestion: a)We’ll build holes’ type as our suggested in Figxx.

    b) Please advise.

    2. Mismatched hole chart information

    Question 2: Mismatched hole size between Diaxxx mil in customer hole chart and Diaxxx mil in

    customer DWG (see figxx & xx).

    Follow customer hole chart to do. Suggestion: a)

    b) Follow data marked in customer DWG to do.

    3. Special hole with strange conductor pad

    Question 3: In customer hole chart, the Dia xxx mil hole is PTH hole, but there is no conductor pad

    at the corresponding position (see figxx)

    Suggestion: a)Just follow hole chart & CAD to do it PTH without annular ring..

    b) Do it as NPTH hole.

    4. Hole Diameter Tol

    Question 4: Not specified the tolerance of hole diameter/slot in customer spec and DWG.

    Suggestion: a) We’ll build them as below:

     For Via holes(less than Dia 18mil): +3/-8mil;

    For PTH (except Via): +/-3mil; For NPTH: +/-2mil.

    For slot width +/-3 mil, slot length +/-4mil.

    b) Please advise.

     5. Press fit hole

    Question 5: Customer requires Press fit hole finished Diaxxx +/-xxx mil and drill bit size

    Diaxxx+/-xxx mil, but due to the uneven conductor design, and generally we need to

    compensate about xxx mil for HAL surface final (see figxx), so we can’t meet them at

    the same time.

    Suggestion: a) Just control finished hole diameter & tol, and ignore the requirement of drill bit size &

    Tol.

    b) If customer insist on it, we have to order special drill bit, please reconsider cost (Only

    under the condition that customer strongly require it and it’s feasible, usually we don’t

    raise the suggestion).

     6. Overlapped hole

     Question 6: Dia xxx mil hole is overlapped with another small Dia xxx mil hole.

    Suggestion: a)We’ll delete the small hole.

    b) Please advise.

    

    very close, do it PTH slot directly>

    

    smooth production, raise EQ to change it as slot >

     7. Too close between hole to board edge

     Question 7: The distance from hole edge to board edge is very close (only xxx mil).

    Suggestion: a) Follow CAD to do, but after building profile, the hole will broken.

    b) We’ll move the hole toward unit about xxx mil to avoid broken.

    (or propose to change hole size; if the hole is PTH, need to consider annular ring)

     8. Hole quantity

    Question 8: Mismatched hole quality between xxx in customer hole chart and xxx in CAD drill layer

    (see fig xx).

    Suggestion: Follow CAD drill layer to do.

     9. Hole location Tol

    Question 9: The position tolerance +/-xxx mil of hole position is required in customer DWG, but due

    to regristration deviation during drilling & D/F process, it’s very tight. (see fig xx).

    Suggestion: To smooth production, please kindly relax it to +/-xxx mil.

    

    Position of stamp hole 10.

    Question 10: According to customer design stamp holes, it’s very close to conductor pattern, it’ll

    cause exposed GND copper/line (see fig xx).

    Suggestion: a) We’ll shave GND copper about xxx mil/move line about xxx mil to avoid

    exposed GND copper/line.

     b) Follow CAD to do, but exposed GND copper/line is acceptable

    (Note: it’ll increase cost ---- to use second drill; generally, don’t use it)

    V. Drawing, dimension & Tolerance

     1. Outline tolerance

     Question 1: Not specified outline tolerance in customer spec/DWG.

    Suggestion: Do it +/-5 mil.

    Mismatched dimensions 2.

     Question 2: Mismatched dimensions between data xxx mm marked in DWG and data XXX

    mm measured from CAD drill layer/ CAD outline frame. (see figxx & xx).

    Suggestion: a) Follow data marked in DWG to do.

     b) Follow data measured from CAD drill layer/CAD outline frame.

     3. Missing dimensions

    Question 3: Missing some dimensions in customer DWG (see figxx).

    Suggestion: Follow CAD 1:1 outline DWG to do.

    4. Inner corner size

    Question 4: Not specified inner corner. (see figxx)

     Suggestion: a) Max R0.6mm for the inner corner in those small slots is acceptable, and

    R1.2mm for other inner corner.

     b)Well rout the slot to be into breakaway area half-rout bit to

    ensure sharp corner in unit outline.

     (see figxx).

     5. Asymmetry Tol

     Question 5: Customer call the dimension with asymmetry tolerance in the unit

    DWG, and marked unspecified tolerance +/-xxx mil for those

    dimensions in array DWG. but it can’t be met at the same tiem.

    Suggestion: Well ensure the dimension with asymmetry tolerance in the unit DWG, but regard the

    dimensions (see figxx) as reference only.

    6. Data of hole to edge

    Question 6: No call the data from hole center to board edge. (see figxx)

    Suggestion: We’ll do it xxx mil measured from CAD drill layer and outline frame.

     7. Quality & side for Fiducial mark?

    Question 7: We don’t know which side the fiducial marks should be add? (see figxx)

    Suggestion: a) Add them on both sides.

     b) Just on Top side.

     8. Direction to arrange unit in array DWG

    Question 8: The related direction of unit to array DWG doesn’t defined.

    Suggestion: We’ll build them as the same direction as shown in figxx.

     VI. Impedance items

    1. Which kind of line?

    Question 1: Customer don’t specify which kind of line is impedance line.

    Suggestion: Control 5 mil lines on layer #.

    Question2: Customer requires to control impedance value xxx Ohm for xxx mil line

    on layer, but there is no such kind of line in CAD gerber.

    Suggestion: a) Well control impedance xxx Ohm for xxx mil line.

     b) Ignore the requirement of impedance, and follow CAD gerber to do, and

    ensure lay-up structure & line width/spacing process allowance tolerance

    specified by customer.

    2. Impedance value

    Question 3: Based on the Lay-up structure specified by customer, after calculating the impedance

    value with the polar software, the impedance value will be xxx Ohms, but xxx

    Ohms is required in customer DWG/spec.

    Suggestion: a) Follow customer lay-up, but control impedance value as xxx Ohms.

     b) To meet impedance value xxx Ohms called by customer, but please

    allow us to adjust lay-up as shown in figxx.

    c)To meet the requirement of xxx Ohms, we have to adjust finished

    conductor width from xxx mil to xxx mil.

    

    Question 4: Customer call xxx ohm (aaa mil line), XXXohm (bbb mil line) and AAA ohm(ccc mil

    line) on layerA, after base on the calculating value from polar software, we cant meet

    them at the same time.

    Suggestion : Just control xxx, for other line, ignore impedance requirement, but ensure the

    requirement of lay-up & line width/spacing defined by customer. 3. Coupon line width

    Question 5: Customer require to control impedance xxx Ohm for xxx mil line, but the line width is

    xxx mil in the coupon designed by customer.

    Suggestion: a) Change the line width in the coupon from xxx mil to xxx mil.

     b) Follow CAD to do, and we’’ll measure impedance value based on coupon designed

    by ourselves at the production board edge.

    4. Distance between holes in coupon

    Question 6: Customer design the distance between two holes in impedance coupon is xxx mil, but

    our normal distance to test in our plant is xxx mil.

    Suggestion: a) We would like to change the distance as xxx mil used in our plant.

     b) Follow CAD design, but we’ll just measure the impedance coupon designed by

    ourselves at the production board edge.

    5 Test point issue

    Question 7: Customer specified test point for xxx Ohm, but we found there is no impedance line to

    connect with it.

    Suggestion: We’ll just control xxx Ohm for the xxx mil line and measure impedance value from the

    coupon designed by ourself at production board edge.

    VII. Cu Thk

    1. PTH hole

    Question 1: Min xxx mil copper thickness in hole wall is called in DWG. But it’s tight for our plant

    capability.

    Suggestion: To smooth production, please confirm min xxx mil is acceptable.

    2. Buried hole & blind hole

    Question 2: Customer doesn’t call the copper thickness for blind or buried hole:

    Suggestion: We propose to do 0.7mil(min) & 0.8mil(avg) when the blind hole size more than

    0.15mm, and 0.4mil(min) & 0.5mil(avg) when the blind hole size equal and less than

    0.15mm in the blind microvias; 0.5mil(min)&0.6mil(avg) in the buried holes according

    to IPC-6012 Class 2 spec.

    3. Surface copper Thk

    Question 3: Customer requires copper Thk xxx mil on surface, it’s very tight, due to CAD design

    conductor is uneven, if meet such thicker copper on surface, then the copper Thk in hole

    wall will be about xxx mil, then can’t meet finished hole diameter at the same time.

    Suggestion: Please kindly accept min xxx mil on surface.

    VIII. Conductor design

    1. Delete non-functional isolated pads in inner layer

    Question 1: There are some Non-functional isolated PADs in inner layerXX. It is easy to lead to short in

    inner layers during production process.

    Suggestion: In order to smooth production, we propose to delete these Non-fuctional isolated PADs,

    please confirm.

    2. Annular ring

    Question 2: For all Dia13mil holes in all layers, CAD design circuit PAD is Dia25mil,

    when we use small drill-bit dia0.35mm (finished hole Dia Tol will be control

    as Dia13+0/-13mil), the annular ring is only 5.6mil, and there is no enough

    space in CAD design to enlarge circuit PAD. And customer spec call finished

    annular ring 2.0 mil at the same time. Due to the position deviation from

    drilling process and registration accuracy during dry-film process, if meet

    such requirement, production film annular ring need 7mil on outer layer.

    Suggestion: a) well add teardrop at the line to PAD conjunction area and ensure min 2.0 mil annular

    ring.But for other area, please accept max 90 degree breakout.

     b) Please allow change hole Diameter from +/-xxx mil to +xxx/-BBBmil, then we can use

    smaller drill bit (Diaxxxmil) to ensure mininum xxx mil annular ring.

    (Apply to the case: choose big drill-bit per customer requirement, but cant meet annular

    ring. If change tolerance, then can use small drill-bit to meet annular ring).

    3. Clearance issue

    Question 3: CAD design copper clearance is only xxx mil, its easy to cause short in inner layer, well

    shave GND copper about xxx mil to get XXX mil copper clearance to avoid short in inner

    layer.

    Suggestion: Please confirm.

    4. Isolated line to separate different area in inner layers

    Question 4: CAD design different GND copper area, but one PTH hole drilled on the separated line,

     Itll cause the the two isolated GND area short.

    Suggestion: Well shave GND copper about xxx mil to get 10 mil copper clearance in inner layer.

    5. Tenting hole issue

    Question 5: The distance from NPTH hole edge to GND/line edge is only xxx mil on outer layer,

     To facilitate to tent hole during D/F process, well shave GND copper/move line about

    xxx mil. (tenting capability is 7 mil in plant)

     Suggestion: Please confirm.

    6. Line width/spacing Tol

    Question 6: Line width/spacing process allowance tolerance is +/-10% of master artwork is required

    in customer DWG/Spec, but its tight for us to control.

    Suggestion: Well refer to spec IPC-A-600G Class 2 to control it as +/-20% of master artwork. 7. Strange design

    Question 7: We dont know whether the design shown in figxx (describe the details) is normal or not?

    Suggestion: a) Follow CAD design to do only.

     b) Please advise.

    8. Exposed copper along board edge

    Question 8: In CAD design, conductor pad/GND copper is very near board edge (only 2 mil clearance),

    it will cause exposed copper after building profile.

    Suggestion: Well shave conductor pad/GND copper about xxx mil to avoid exposed copper.

    9. Plating Gold finger guide line

    Question 9: Line width/spacing process allowance tolerance is +/-10% of master artwork is required

    in customer DWG/Spec, but its tight for us to control.

    Suggestion: Well refer to spec IPC-A-600G Class 2 to control it as +/-20% of master artwork.

    10. Isolated fiducial mark

    Question 10: There are some isolated fiducial marks at the blank area in the unit (or at the breakaway

    area), it will be plated thicker copper than other area, and its easy to be peeled

    off/damaged during production process.

    Suggestion: Well add copper ring (14 mil line width) around fiducial mark covered by solder resist. 11. Dummy pattern at breakaway area

    Question 11: To balance lay-up structure and keep electrical current dentify even to improve plating

    quality, well add dummy pattern at breakaway area.

     Suggestion: Please confirm.

    12. Dummy pattern at blank area in board

    Question 12: CAD design conductor pattern is uneven, to balance lay-up structure and improve plating

    quality, well add dummy pattern away from any pattern 100 mil at blank area in the unit.

    (see figxx)

     Suggestion: Please confirm.

    13. Fill in the narrow spacing

    Question 13: There are some narrow line spacing (only xxx mil) in CAD design, its not easy to

    fabricate and cause film scrip defect during D/F process.

     Suggestion: To smooth production, we propose to fill in them as solid.

    14. Similar issue on Made in USA

    Question 14: There are characters MADE IN USA etched in xxx film, due to the limitation of custom

    policy, well change it as MADE IN CHINA.

    Suggestion: Please confirm.

    15. LOGO position & type

    Question 15: We’ll etch our LOGO on xxx layer at the position shown in figxx.

    Suggestion: Please confirm.

IVIII. Solder mask & Legend film & other (Carbon ink & peel able mask)

    1. Solder mask Thk

    Question 1: Customer requires solder mask thickness min xxx mil, but if meet it, we have to silkscreen

    at least twice, it’ll increase cost and lengthen production cycle.

    Suggestion: To reduce cost and shorten lead-time, please allowed us to change solder mask thickness

    from xxx mil to min 0.4 mil on the surface of conductor.

    2. Plugged hole items

    Question 2: We found there are no holes at the corresponding position shown in plugged film (see figx).

    Ignore the requirement to plug holes at these positions without holes. Suggestion:

    3. Solder mask bridge

    Question 3: CAD design spacing between SMT pads is 6mil only, but to meet the conductor allowance

    tolerance, we have to enlarge SMT pad xx mil. Furthermore, to avoid solder mask encroach

    on SMT PAD, need at least xx mil solder resist opening bigger than SMT pad per side, then

    we just can get xx mil solder mask bridge. However, due to limitation of process, if build

    the s/m bridge, we need at least xxx mil s/m bridge.

     Suggestion: a) Finished SMT width xxx mil (min) is acceppable.

     b) Well delete the s/m bridge.

    4. Exposed line/pad

    Question 4: Solder mask opening is very bigger to cause exposed line/pad (see fig x).

    Suggestion: Well shave solder mask opening about xx mil to avoid exposed line/pad.

    5. Solder mask bridge between Gold Finger

     Question 5: There is solder mask bridge between gold fingers (see attached file 1) in CAD design, its

    easy to be damaged/peeled off , because of solution corruption during plating Gold finger

    process. To smooth production and improve gold finger quality, we propose to delete the

    solder resist bridge.

     Suggestion: Please confirm.

    6. Distance between the S/M opening edge of via hole/pad and S/M opening of the top of Gold Finger

    Question 6: In CAD design, some via holes & PADs with S/M opening is very near to the S/M opening

    of Gold Finger (xxx mil), due to the need of process (It is necessary to cover gold finger

    with high temperature tape during HAL process), the distance from hole or line edge to the

    S/M opening edge of G/F is at least 25 mil.

    Suggestion: a) Follow CAD to do, but those holes & pads will be partly covered by Gold.

     b) Shave solder mask opening of G/F about 10 mil and allow the top of G/F to be covered

    by solder resist max 10 mil.

    7. Extra S/M opening

    Question 7: We found some solder mask openings at the locations, where there is no corresponding

    circuit pads and holes (see figxx).

    Suggestion: Well follow CAD design to do, please confirm.

    8. Missing S/M opening for SMT pad/round pad

    Question 8: No solder mask openings for some SMD pads/round pads (see figxx).

    Suggestion: a) Follow CAD Gerber to build.

    b) Add normal solder mask openings for these pads to avoid no solder resist ink on it. 9. Component mark bridge

    Question 9: CAD design SMT pad spacing is xxx mil, but due to limitation of process (minimum

    Component mark bridge 4 mil, and we have to get minimum 6 mil spacing away from

    circuit pads to avoid component mark ink being on conductor pads), so we have no way to

Report this document

For any questions or suggestions please email
cust-service@docsford.com